NEC PD703114 User Manual page 246

Figure 9-20. Operation Timing in PWM Mode 1 (Asymmetric Triangular Wave) (1/2)
(a) Operation timing of compare registers 0n0 to 0n2 (CM0n0 to CM0n2)
count value
Interrupt request
Positive phase
(TO0n0, TO0n2, TO0n4)
Negative phase
(TO0n1, TO0n3, TO0n5)
Remarks 1. The above figure shows the timing chart when both BFTE3 and BFTEN of the TMC0n register
are 1, and transfer from BFCMn3 to CM0n3, or from BFCMnx to CM0nx is enabled. Transfer is
not performed when BFTE3 = 0 or BFTEN = 0.
2. n = 0, 1
3. x = 0 to 2
4. t: Dead time = (DTRRn + 1)/f
5. To not use dead time, set the TM0CEDn bit of the TMC0n register to 1.
6. The above figure shows an active-high case.
7. INTCM01x is generated on a match between TM01 and CM01x (a to d in the above figure).
INTCM00x is not generated.
246
CHAPTER 9 TIMER/COUNTER FUNCTION
CM0n3 (f)
a
TM0n
0000H
CM0nx
match
BFCMnx a b
CM0nx a
BFCMn3
f
f
CM0n3
INTCM0n3
INTCM01x
F/F
DTMnx
t
(f
CLK CLK
User's Manual U15195EJ5V0UD
CM0n3 (g)
c
b
CM0nx CM0nx
match match
c d
b c
g
INTTM0n INTCM0n3
INTCM01x INTCM01x
t t
: Base clock)
d
CM0nx
match
e
d e
h
g h
INTTM0n
INTCM01x
t