NEC PD703114 User Manual page 436

(4) Allowable baud rate range during reception
The degree to which a discrepancy from the transmission destination's baud rate is allowed during reception
is shown below.
Caution The equations described below should be used to set the baud rate error during reception
so that it always is within the allowable error range.
UART0
transfer rate
Minimum allowable
transfer rate
Maximum allowable
transfer rate
As shown in Figure 10-14, after the start bit is detected, the receive data latch timing is determined according
to the counter that was set by the BRGC0 register. If all data up to the final data (stop bit) is in time for this
latch timing, the data can be received normally.
If this is applied to 11-bit reception, the following is theoretically true.
–1
FL = (Brate)
Brate: UART0 baud rate
k: BRGC0 register setting value
FL: 1-bit data length
When the latch timing margin is 2 base clocks, the minimum allowable transfer rate (FLmin) is as
follows.
= ×
FL min 11 FL
436
CHAPTER 10 SERIAL INTERFACE FUNCTION
Figure 10-14. Allowable Baud Rate Range During Reception
Latch timing
Start bit Bit 0
FL
Start bit Bit 0
Start bit Bit 0
−
k 2 21 k
− × =
FL
2 k 2
User's Manual U15195EJ5V0UD
Bit 1 Bit 7
1 data frame (11 × FL)
Bit 1 Bit 7
FLmin
Bit 1 Bit 7
FLmax
+
2
FL
k
Parity bit Stop bit
Parity bit Stop bit
Parity bit Stop bit