Interrupt Requests - NEC PD703114 User Manual

V850e/ia2 32-bit single-chip microcontrollers
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10.3.4 Interrupt requests

The following two types of interrupt request are generated from UART1.
Reception completion interrupt (INTSR1)
Transmission completion interrupt (INTST1)
The reception completion interrupt has higher default priority than the transmission completion interrupt.
(1) Reception completion interrupt (INTSR1)
In the reception enabled state, the reception completion interrupt (INTSR1) is generated when data in the
receive shift register undergoes shift-in processing and is transferred to the reception buffer.
The reception completion interrupt request (INTSR1) is generated following stop-bit sampling and upon the
occurrence of an error.
In the reception disabled state, no reception completion interrupt is generated.
Caution A reception completion interrupt (INTSR1) is generated when the last bit of receive data
(stop bit) is sampled.
(2) Transmission completion interrupt (INTST1)
Since UART1 does not have a transmit buffer, a transmission completion interrupt request (INTST1) is
generated when one frame of data containing 7-bit or 8-bit characters or two frames of data containing 9-bit
characters are shifted out from the transmit shift register (TXS1, TXSL1).
CHAPTER 10 SERIAL INTERFACE FUNCTION
Table 10-5. Default Priority of Generated Interrupts
Interrupt
Reception completion
Transmission completion
User's Manual U15195EJ5V0UD
Priority
1
2
451

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