NEC PD703114 User Manual page 505

V850e/ia2 32-bit single-chip microcontrollers
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(d) Cautions
To continue repeat transfers, it is necessary to either read the SIRBn register or write to the SOTBn
register during the transfer reservation period.
If access is performed to the SIRBn register or the SOTBn register when the transfer reservation period
is over, the following occurs.
(i) In case of conflict between transfer request clear and register access
Since request cancellation has higher priority, the next transfer request is ignored.
transfer is interrupted, and normal data transfer cannot be performed.
Figure 10-33. Transfer Request Clear and Register Access Conflict
SCKn
(I/O)
INTCSIn
interrupt
rq_clr
Reg_R/W
Remarks 1. n = 0, 1
2. rq_clr: Internal signal. Transfer request clear signal.
Reg_R/W:
CHAPTER 10 SERIAL INTERFACE FUNCTION
Transfer reservation period
Internal signal. This signal indicates that the receive data buffer register (SIRBn/
SIRBLn) read or transmit data buffer register (SOTBn/SOTBLn) write was
performed.
User's Manual U15195EJ5V0UD
Therefore,
505

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