Input/Output Pins - Epson S1C31D50 Technical Manual

17 16-BIT PWM TIMERS (T16B)
T16B
CLK_T16B0
EXCL00
EXCL01
Clock
generator
CLK_T16Bn
EXCLn0
EXCLn1

17.2 Input/Output Pins

Table 17.2.1 lists the T16B pins.
Pin name
EXCLnm
TOUTnm/CAPnm
If the port is shared with the T16B pin and other functions, the T16B input/output function must be assigned to the
port before activating T16B. For more information, refer to the "I/O Ports" chapter.
17-2
Counter block Ch.0 Comparator/capture block Ch.0
CNTMD[1:0]
ONEST
UP_DOWN RUN
BSY PRESET
Counter
ZERO/MAX signal
TC[15:0]
MAX counter data
register
MC[15:0]
MAXBSY
MODEN
DBRUN
CLKDIV[3:0]
CLKSRC[2:0]
Counter block Ch.n Comparator/capture block
Figure 17.1.1 T16B Configuration
Table 17.2.1 List of T16B Pins
I/O* Initial status*
I I (Hi-Z)
O or I O (L)
Seiko Epson Corporation
Comparator/capture circuits 0 & 1
CBUFMD[2:0] CCMD
SCS
Compare/Capture 0
CAPIS[1:0]
data register
CC[15:0]
CAPTRG[1:0]
Compare Capture
buffer 0 circuit 0
CAPI0
Comparator
MATCH signal
circuit 0
Comparator
MATCH signal
circuit 1
CAPI1
Compare Capture
buffer 1 circuit 1
SCS
Compare/Capture 1
CAPIS[1:0]
data register
CC[15:0]
CAPTRG[1:0]
CBUFMD[2:0] CCMD
DMA request
MZDMAENx
control circuit
CCmDMAENx
Interrupt
CAPOWmIE
control circuit
CMPCAPmIE
CNTMAXIE
CNTZEROIE
Ch.n
External clock input
TOUT signal output (in comparator mode) or
capture trigger signal input (in capture mode)
* Indicates the status when the pin is configured for T16B.
TOUTMT
TOUTO
TOUTMD[2:0]
TOUTINV
CAP00
TOUT control
TOUT00
circuit 0
TOUT control
TOUT01
circuit 1
CAP01
TOUTMT
TOUTO TOUT02/03
TOUTMD[2:0] CAP02/03
TOUTINV
TOUT04/05
CAP04/05
To DMA controller
To CPU core
CAPOWmIF
CMPCAPmIF
CNTMAXIF
CNTZEROIF
CAPn0/1
TOUTn0/1
CAPn2/3
TOUTn2/3
CAPn4/5
TOUTn4/5
To DMA controller
To CPU core
Function
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)