Input/Output Pins; Clock Sources - Epson S1C17F13 Technical Manual

2 POWER SUPPLY, RESET, AND CLOCKS
2.3.2

Input/Output Pins

Table 2.3.2.1 lists the CLG pins.
Pin name I/O*
OSC1 A
OSC2 A
OSC3 A
OSC4 A
EXOSC I
FOUT O
If the port is shared with the CLG input/output function and other functions, the CLG function must be assigned to
the port. For more information, refer to the "I/O Ports" chapter.
2.3.3

Clock Sources

OSC3B oscillator circuit
The OSC3B oscillator circuit features a fast startup and no external parts are required for oscillating. Figure
2.3.3.1 shows the configuration of the OSC3B oscillator circuit.
The OSC3B oscillator circuit output clock OSC3BCLK is used as SYSCLK at booting.
The OSC3BCLK frequency can be selected using the CLGOSC3B.OSC3BFREQ[1:0] bits.
For more information on the oscillation characteristics, refer to "OSC3B oscillator circuit characteristics" in the
"Electrical Characteristics" chapter.
OSC3A oscillator circuit
The OSC3A oscillator circuit is a high-speed oscillator circuit that uses a crystal or ceramic resonator. Figure
2.3.3.2 shows the configuration of the OSC3A oscillator circuit.
OSC3A oscillator circuit
Gate capacitor
C OSC3
G3
X'tal3/
Ceramic3
Drain capacitor
OSC4
C
D3
A crystal resonator (X'tal3) or ceramic resonator (Ceramic3) should be connected between the OSC3 and OSC4
pins. Additionally, two capacitors (C
The embedded gain-controlled oscillation inverter allows selection of the resonator from a wide frequency range.
For the recommended parts and the oscillation characteristics, refer to the "Basic External Connection Diagram"
chapter and "OSC3A oscillator circuit characteristics" in the "Electrical Characteristics" chapter, respectively.
2-6
Table 2. 3.2.1 List of CLG Pins
Initial status*
– OSC1A oscillator circuit input
– OSC1A oscillator circuit output
– OSC3A oscillator circuit input
– OSC3A oscillator circuit output
I EXOSC clock input
O (L) FOUT clock output
OSC3B oscillator circuit
OSC3BEN
Oscillation
Clock
stabilization
oscillator
waiting circuit
OSC3BFREQ[1:0]
Interrupt
control circuit
OSC3BSTAIE
Figure 2. 3.3.1 OSC3B Oscillator Circuit Configuration
OSC3AEN INVN[1:0]
Gain-
V
DD
controlled
oscillation
inverter
V
DD
V
SS
Feedback Drain resistor R
resistor R
F3
OSC3ASTAIE
V
SS
Figure 2. 3.3.2 OSC3A Oscillator Circuit Configuration
and C ) should be connected between the OSC3/OSC4 pins and V
G3 D3
Seiko epson Corporation
Function
* Indicates the status when the pin is configured for CLG.
OSC3BSTAIF
OSC3AWT[1:0]
Oscillation
Noise filter stabilization
waiting circuit
Interrupt
D3
control circuit
OSC3BCLK
Interrupt
controller
OSC3ACLK
Interrupt
controller
OSC3ASTAIF
S1C17F13 TeChniCal Manual
.
SS
(Rev. 1.0)