Epson S1C31D50 Technical Manual page 368

Cmos 32-bit single chip
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APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address
Register name
0x0020
RTCAMON
00cc
(RTCA Month/Day
Register)
0x0020
RTCAYAR
00ce
(RTCA Year/Week
Register)
0x0020
RTCAINTF
00d0
(RTCA Interrupt Flag
Register)
0x0020
RTCAINTE
00d2
(RTCA Interrupt En-
able Register)
0x0020 0100–0x0020 0106
Address
Register name
0x0020
SVD3CLK
0100
(SVD3 Clock Control
Register)
0x0020
SVD3CTL
0102
(SVD3 Control
Register)
AP-A-4
Bit
Bit name
15–13 –
12
RTCMOH
11–8 RTCMOL[3:0]
7–6 –
5–4 RTCDH[1:0]
3–0 RTCDL[3:0]
15–11 –
10–8 RTCWK[2:0]
7–4 RTCYH[3:0]
3–0 RTCYL[3:0]
15
RTCTRMIF
14
SW1IF
13
SW10IF
12
SW100IF
11–9 –
8
ALARMIF
7
T1DAYIF
6
T1HURIF
5
T1MINIF
4
T1SECIF
3
T1_2SECIF
2
T1_4SECIF
1
T1_8SECIF
0
T1_32SECIF
15
RTCTRMIE
14
SW1IE
13
SW10IE
12
SW100IE
11–9 –
8
ALARMIE
7
T1DAYIE
6
T1HURIE
5
T1MINIE
4
T1SECIE
3
T1_2SECIE
2
T1_4SECIE
1
T1_8SECIE
0
T1_32SECIE
Bit
Bit name
15–9 –
8
DBRUN
7
6–4 CLKDIV[2:0]
3–2 –
1–0 CLKSRC[1:0]
15
VDSEL
14–13 SVDSC[1:0]
12–8 SVDC[4:0]
7–4 SVDRE[3:0]
3
EXSEL
2–1 SVDMD[1:0]
0
MODEN
Seiko Epson Corporation
Initial
Reset
R/W
0x0
R
0
H0
R/W
0x1
H0
R/W
0x0
R
0x0
H0
R/W
0x1
H0
R/W
0x00
R
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x0
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x0
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
Supply Voltage Detector (SVD3)
Initial
Reset
R/W
0x00
R
1
H0
R/WP
0
R
0x0
H0
R/WP
0x0
R
0x0
H0
R/WP
0
H1
R/WP –
0x0
H0
R/WP Writing takes effect when the
0x1e
H1
R/WP –
0x0
H1
R/WP
0
H1
R/WP
0x0
H0
R/WP
0
H1
R/WP
S1C31D50/D51 TECHNICAL MANUAL
Remarks
Cleared by writing 1.
Cleared by writing 1.
Remarks
SVD3CTL.SVDMD[1:0] bits
are not 0x0.
(Rev. 2.00)

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