Epson S1C31D50 Technical Manual page 406

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address Register name
0x0020 UART3_1
0610 TBEDMAEN
(UART3 Ch.1
Transmit Buffer
Empty DMA Request
Enable Register)
0x0020 UART3_1
0612 RB1FDMAEN
(UART3 Ch.1 Receive
Buffer One Byte Full
DMA Request Enable
Register)
0x0020 UART3_1CAWF
0614 (UART3 Ch.1 Carrier
Waveform Register)
0x0020 0620–0x0020 0634
Address Register name
0x0020 UART3_2CLK
0620
(UART3 Ch.2 Clock
Control Register)
0x0020 UART3_2MOD
0622 (UART3 Ch.2 Mode
Register)
0x0020 UART3_2BR
0624
(UART3 Ch.2 Baud-
Rate Register)
0x0020 UART3_2CTL
0626 (UART3 Ch.2 Control
Register)
0x0020 UART3_2TXD
0628
(UART3 Ch.2 Trans-
mit Data Register)
0x0020 UART3_2RXD
062a
(UART3 Ch.2 Receive
Data Register)
AP-A-42
Bit Bit name
15–8 –
7–4 –
3–0 TBEDMAEN[3:0]
15–8 –
7–4 –
3–0 RB1FDMAEN[3:0]
15–8 –
7–0 CRPER[7:0]
Bit Bit name
15–9 –
8 DBRUN
7–6 –
5–4 CLKDIV[1:0]
3–2 –
1–0 CLKSRC[1:0]
15–13 –
12 PECAR
11 CAREN
10 BRDIV
9 INVRX
8 INVTX
7 –
6 PUEN
5 OUTMD
4 IRMD
3 CHLN
2 PREN
1 PRMD
0 STPB
15–12 –
11–8 FMD[3:0]
7–0 BRT[7:0]
15–8 –
7–2 –
1 SFTRST
0 MODEN
15–8 –
7–0 TXD[7:0]
15–8 –
7–0 RXD[7:0]
Seiko Epson Corporation
Initial Reset R/W
0x00 – R
0x0 – R
0x0 H0 R/W
0x00 – R
0x0 – R
0x0 H0 R/W
0x00 – R
0x00 H0 R/W
Initial Reset R/W
0x00 – R
0 H0 R/W
0x0 – R
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0x00 – R
0x00 H0 R/W
0x00 – R
0x00 H0 R
S1C31D50/D51 TECHNICAL MANUAL
Remarks
–
–
–
UART (UART3) Ch.2
Remarks
–
–
–
–
–
–
(Rev. 2.00)