Comparator/Capture Block Operations - Epson S1C31D50 Technical Manual

17 16-BIT PWM TIMERS (T16B)
(1) Repeat up/down count mode
Data (W) → MC[15:0]
MODEN = 1 PRESET = 1
RUN = 1
0xffff
Counter
0x0000
(2) One-shot up/down count mode
Data (W) → MC[15:0]
PRESET = 1
MODEN = 1
RUN = 1
0xffff
Counter
0x0000
Figure 17.4.2.3 Operations in Repeat Up/Down Count and One-shot Up/Down Count Modes

17.4.3 Comparator/Capture Block Operations

The comparator/capture block functions as a comparator to compare the counter value with the register value set or
a capture circuit to capture counter values using the external/software trigger signals.
Comparator/capture block operating mode
The comparator/capture block includes two systems (four or six systems) of comparator/capture circuits and
each system can be set to comparator mode or capture mode, individually.
Set the T16B_nCCCTLm.CCMD bit to 0 to set the comparator/capture circuit m to comparator mode or 1 to set
it to capture mode.
Operations in comparator mode
The comparator mode compares the counter value and the value set via software. It generates an interrupt and
toggles the timer output signal level when the values are matched. The T16B_nCCRm register functions as the
compare data register used for setting a comparison value in this mode. The TOUTnm/CAPnm pin is configured
to the TOUTnm pin.
When the counter reaches the value set in the T16B_nCCRm register during counting, the comparator asserts
the MATCH signal and sets the T16B_nINTF.COMPCAPmIF bit (compare interrupt flag) to 1.
When the counter reaches the MAX value in comparator mode, the T16B_nINTF.CNTMAXIF bit (counter
MAX interrupt flag) is set to 1. When the counter reaches 0x0000, the T16B_nINTF.CNTZEROIF bit (counter
zero interrupt flag) is set to 1.
17-8
RUN = 1
RUN = 0
Count cycle
RUN = 0
Seiko Epson Corporation
Data (W) → MC[15:0]
Data (W) → MC[15:0]
Data (W) → MC[15:0]
RUN = 1
S1C31D50/D51 TECHNICAL MANUAL
Software operation
Hardware operation
MAX value
Time
MAX value
Time
(Rev. 2.00)