Control Register And Port Function Configuration Of This Ic; P0 Port Group - Epson S1C31D50 Technical Manual

7 I/O PORTS (PPORT)

7.7 Control Register and Port Function Configuration of this IC

This section shows the PPORT control register/bit configuration in this IC and the list of peripheral I/O functions
selectable for each port.

7.7.1 P0 Port Group

The P0 port group supports the GPIO and interrupt functions.
Register name Bit
P0DAT 15
(P0 Port Data
14
Register)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
P0IOEN 15
(P0 Port Enable
14
Register)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
7-12
Table 7.7.1.1 Control Registers for P0 Port Group
Bit name Initial
P0OUT7 0
P0OUT6 0
P0OUT5 0
P0OUT4 0
P0OUT3 0
P0OUT2 0
P0OUT1 0
P0OUT0 0
P0IN7 0
P0IN6 0
P0IN5 0
P0IN4 0
P0IN3 0
P0IN2 0
P0IN1 0
P0IN0 0
P0IEN7 0
P0IEN6 0
P0IEN5 0
P0IEN4 0
P0IEN3 0
P0IEN2 0
P0IEN1 0
P0IEN0 0
P0OEN7 0
P0OEN6 0
P0OEN5 0
P0OEN4 0
P0OEN3 0
P0OEN2 0
P0OEN1 0
P0OEN0 0
Seiko Epson Corporation
Reset R/W Remarks
H0 R/W –
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R –
H0 R
H0 R
H0 R
H0 R
H0 R
H0 R
H0 R
H0 R/W –
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W –
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
S1C31D50/D51 TECHNICAL MANUAL
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(Rev. 2.00)