T16B Ch.n Compare/Capture M Data Register - Epson S1C31D50 Technical Manual

T16B_nCCCTLm.
TOUTMD[2:0]
T16B_nCCCTLm.
bits
TOUTMT bit
Toggle mode
0x4
0
1
Set/reset mode
0x3
0
1
Toggle/reset mode
0x2
0
1
Set mode
0x1
0
1
Software control mode
0x0
*
Bit 1 TOUTINV
This bit selects the TOUTnm signal polarity.
1 (R/W): Inverted (active low)
0 (R/W): Normal (active high)
The T16B_nCCCTLm.TOUTINV bit is control bit for comparator mode and is ineffective in capture
mode.
Bit 0 CCMD
This bit selects the operating mode of the comparator/capture circuit m.
1 (R/W): Capture mode (T16B_nCCRm register = capture register)
0 (R/W): Comparator mode (T16B_nCCRm register = compare data register)

T16B Ch.n Compare/Capture m Data Register

Register name Bit
T16B_nCCRm 15–0 CC[15:0]
Bits 15–0 CC[15:0]
In comparator mode, this register is configured as the compare data register and used to set the com-
parison value to be compared with the counter value.
In capture mode, this register is configured as the capture register and the counter value captured by
the capture trigger signal is loaded.
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
TOUT generation mode and operations
Output
Count mode
signal
All count modes TOUTnm
All count modes TOUTnm
TOUTnm+1 The signal is inverted by the MATCHm+1 or MATCHm sig-
Up count mode TOUTnm
Up/down count mode
Down count mode TOUTnm
All count modes TOUTnm
TOUTnm+1 The signal becomes active by the MATCHm+1 signal and
Up count mode TOUTnm
Up/down count mode
Down count mode TOUTnm
All count modes TOUTnm
TOUTnm+1 The signal is inverted by the MATCHm+1 signal and it be-
All count modes TOUTnm
All count modes TOUTnm
TOUTnm+1 The signal becomes active by the MATCHm+1 or
All count modes TOUTnm
Bit name Initial
0x0000
Seiko Epson Corporation
17 16-BIT PWM TIMERS (T16B)
Change in the signal
The signal is inverted by the MATCH signal.
The signal is inverted by the MATCHm or MATCHm+1 sig-
nal.
nal.
The signal becomes active by the MATCH signal and it
becomes inactive by the MAX signal.
The signal becomes active by the MATCH signal and it
becomes inactive by the ZERO signal.
The signal becomes active by the MATCHm signal and it
becomes inactive by the MATCHm+1 signal.
it becomes inactive by the MATCHm signal.
The signal is inverted by the MATCH signal and it be-
comes inactive by the MAX signal.
The signal is inverted by the MATCH signal and it be-
comes inactive by the ZERO signal.
The signal is inverted by the MATCHm signal and it be-
comes inactive by the MATCHm+1 signal.
comes inactive by the MATCHm signal.
The signal becomes active by the MATCH signal.
T h e s i g n a l b e c o m e s a c t i v e b y t h e M AT C H m o r
MATCHm+1 signal.
MATCHm signal.
T h e s i g n a l b e c o m e s a c t i v e b y s e t t i n g t h e T16B _
nCCCTLm.TOUTO bit to 1 and it becomes inactive by
setting to 0.
Reset R/W
H0 R/W –
Remarks
17-31