Epson S1C31D50 Technical Manual page 165

Cmos 32-bit single chip
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13 UART (UART3)
Bit 12
PECAR
This bit selects the carrier modulation period.
1 (R/W): Carrier modulation during H data period
0 (R/W): Carrier modulation during L data period
Bit 11
CAREN
This bit enables the carrier modulation function.
1 (R/W): Enable carrier modulation function
0 (R/W): Disable carrier modulation function
Bit 10
BRDIV
This bit sets the UART3 operating clock division ratio for generating the transfer (sampling) clock
using the baud rate generator.
1 (R/W): 1/4
0 (R/W): 1/16
Bit 9
INVRX
This bit enables the USINn input inverting function.
1 (R/W): Enable input inverting function
0 (R/W): Disable input inverting function
Bit 8
INVTX
This bit enables the USOUTn output inverting function.
1 (R/W): Enable output inverting function
0 (R/W): Disable output inverting function
Bit 7
Reserved
Bit 6
PUEN
This bit enables pull-up of the USINn pin.
1 (R/W): Enable pull-up
0 (R/W): Disable pull-up
Bit 5
OUTMD
This bit sets the USOUTn pin output mode.
1 (R/W): Open-drain output
0 (R/W): Push-pull output
Bit 4
IRMD
This bit enables the IrDA interface function.
1 (R/W): Enable IrDA interface function
0 (R/W): Disable IrDA interface function
Bit 3
CHLN
This bit sets the data length.
1 (R/W): 8 bits
0 (R/W): 7 bits
Bit 2
PREN
This bit enables the parity function.
1 (R/W): Enable parity function
0 (R/W): Disable parity function
Bit 1
PRMD
This bit selects either odd parity or even parity when using the parity function.
1 (R/W): Odd parity
0 (R/W): Even parity
13-12
Seiko Epson Corporation
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)

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