1. Manuals
  2. Brands
  3. Epson Manuals
  4. Microcontrollers
  5. S1C63003
  6. Technical manual

Epson S1C63003 Technical Manual

Cmos 4-bit single chip microcontroller
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
CMOS 4-BiT SinGle ChiP MiCROCOnTROlleR
S1C63003/004/008/016
Technical Manual
Rev. 1.1

Advertisement

Table of Contents
loading

Related Manuals for Epson S1C63003

Summary of Contents for Epson S1C63003

  • Page 1 CMOS 4-BiT SinGle ChiP MiCROCOnTROlleR S1C63003/004/008/016 Technical Manual Rev. 1.1...
  • Page 2 2. This evaluation board/kit or development tool is intended for use by an electronics engineer, and it is not the product for con- sumer. The user should use this goods properly and safely. Seiko Epson dose not assume any responsibility and liability of any kind of damage and/or fire coursed by usage of it.
  • Page 3 Dx : Utility tool by the model Qx : Soft simulator Yx : Writer software Corresponding model number 63000: common to S1C63 Family Tool classification C: microcomputer use Product classification S5U1: development tool for semiconductor products Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 4: Table Of Contents

    2.3 S1C63004 Pins .......................2-11 2.3.1 S1C63004 Pin/Pad Layout Diagrams ...............2-11 2.3.2 S1C63004 Pin Description ................2-15 2.4 S1C63003 Pins .......................2-17 2.4.1 S1C63003 Pin/Pad Layout Diagrams ...............2-17 2.4.2 S1C63003 Pin Description ................2-19 2.5 Package ..........................2-20 2.5.1 Plastic Package....................2-20 2.5.2 Ceramic Package for Test Samples ..............2-22 3 CPu and Memory ......................3-1...
  • Page 5 11.4 Event Counter Mode (Timers 0 and 2) ................11-4 11.5 PWM mode (Timers 0–3) [S1C63004/008/016] ............11-5 11.6 16-bit timer mode (Timer 0 + 1, Timer 2 + 3) [S1C63004/008/016] ......11-6 11.7 Interrupt Function ......................11-7 11.8 TOUT Output Control ....................11-7 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 6 14.3.6 LCD Contrast Adjustment [S1C63004/008/016] ..........14-14 14.4 Display Memory ......................14-15 14.5 I/O Memory of LCD Driver ....................14-15 14.6 Precautions ........................14-17 15 Sound Generator .......................15-1 15.1 Configuration of Sound Generator ................15-1 15.2 Controlling Operating Clock ..................15-1 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 7 19.8 Characteristics Curves (reference value) ..............19-9 20 Basic external Wiring Diagram ................20-1 appendix a list of i/O Registers ................aP-a-1 FF00H Oscillation Circuit ................ AP-A-1 FF01H Watchdog Timer ................. AP-A-1 FF02H–FF03H Power Supply Circuit ..............AP-A-1 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 8 D.3 Segment Option File Creation Procedure ..............AP-D-1 D.4 Mask Data File Creation Procedure ................AP-D-2 appendix e Summary of notes .................. aP-e-1 E.1 Summary of Notes by Function ................... AP-E-1 E.2 Precautions on Mounting ..................... AP-E-5 Revision history Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 9: Outline

    The S1C630 Series is suitable for battery driven clocks and watches with temperature and humidity measurement functions. * This manual describes the functions of four mask ROM models in S1C630 Series, S1C63016, S1C63008, S1C63004, and S1C63003. The descriptions are applied to all these four models unless otherwise specified. Features Table 1.

  • Page 10: Block Diagram

    SEN1 SEG54 SEN1, REF1 REF1 SEG53 RFIN1 SEG52 Mask option SEG36–55 LCD Controller Integer Multiplier SEG0–35 & Driver COM0–7 I/O Controller Test TEST & I/O Port Figure 1. 2.1 S1C63016 block diagram Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 11 SEN1 SEG54 SEN1, REF1 REF1 SEG53 RFIN1 SEG52 Mask option SEG36–55 LCD Controller Integer Multiplier SEG0–29 & Driver COM0–7 I/O Controller Test TEST & I/O Port Figure 1. 2.2 S1C63008 block diagram Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 12 R/F Converter RFIN1 SEN1 SEG54 SEN1, REF1 REF1 SEG53 RFIN1 SEG52 Mask option SEG40–55 LCD Controller SEG0–19 & Driver COM0–7 I/O Controller Test TEST & I/O Port Figure 1. 2.3 S1C63004 block diagram Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 13 R/F Converter RFIN1 SEN1 SEG54 SEN1, REF1 REF1 SEG53 RFIN1 SEG52 Mask option SEG44–55 LCD Controller SEG0–9 & Driver COM0–4 I/O Controller Test TEST & I/O Port Figure 1. 2.4 S1C63003 block diagram Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 14: Mask Option

    LCD drive power source. When the internal power supply is selected, the reference voltage for boosting (V ) can be set using a register. The S1C63003 LCD drive power source can also be selected from the internal power supply and an external power supply by mask option. When using the internal power supply, the reference...
  • Page 15 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 16 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain 1. Complementary 2. Pch Open Drain Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 17 Selectable n Fixed * Do not select "Pch Open Drain" as the P50–P53 port output specification if the R/F converter (channel 0) is used. Table 1. 3.3 Option list (S1C63003) Optional item Option Operating power voltage 1. Normal Type (1.8–5.5 V) 2.
  • Page 18 5. External 1/2 bias, V (3.0 V panel) Selectable n Fixed * Do not select "Pch Open Drain" as the P50–P53 port output specification if the R/F converter (channel 0) is used. Seiko epson Corporation 1-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 19 • Leave the address cells of the pins for which "1. I/O" is selected with the "SEG/GPIO/RFC selector" option. • Enter addresses and data bits to the address cells of the pins for which "2. SEG" is selected with the "SEG/ GPIO/RFC selector" option. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 1-11 (Rev. 1.1)
  • Page 20 3. Configurations for nonexistent SEG pins (SEG30 to SEG35) • Always select "LCD segment output (S)" as the output specification of SEG30 to SEG35. • Leave the address cells for SEG30 to SEG35 blank. (Unused addresses will be allocated.) Seiko epson Corporation 1-12 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 21 3. Configurations for nonexistent SEG pins (SEG20 to SEG39) • Always select "LCD segment output (S)" as the output specification of SEG20 to SEG39. • Leave the address cells for SEG20 to SEG39 blank. (Unused addresses will be allocated.) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 1-13 (Rev. 1.1)
  • Page 22 D: Data bit (0–3) N: Nch open drain output notes for using the segment option generator "winsog" (S1C63003) 1. The output specification of SEG0 to SEG9 can be selected from "LCD segment output (S)," "DC complementary output (C)" and "DC Nch open drain output (N)."...

  • Page 23: Pins And Packages

    SRDY_SS/P33 COM6 (SeG42) SIN/P32 COM7 (SeG41) SOUT/P31 SeG0 (SeG40) SCLK/P30 SeG1 SeG2 (SeG39) SeG3 (SeG38) SeG4 (SeG37) SeG5 (SeG36) SeG6 SeG35 SeG7 SeG34 SeG8 Figure 2. 1.1.1 S1C63016 pin layout diagram (QFP15-100pin/TQFP14-100pin) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 24 85 × 77 µm (No. 26 to No. 50, No. 73 to No. 91) Note: A chip thickness that exceeds 400 µm cannot be specified even if a chip other than the standard thickness type is required. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 25 43 SEG16 1236.5 559.0 44 SEG15 1236.5 649.0 45 SEG14 1236.5 739.0 46 SEG13 1236.5 829.0 47 SEG12 1236.5 919.0 48 SEG11 1236.5 1009.0 49 SEG10 1236.5 1099.0 50 SEG9 1236.5 1189.0 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 26: S1C63016 Pin Description

    I/O port pin SFT Serial I/F data input pin SEG42 – LCD segment output pin I/o OP I/O port pin SRDY_SS SFT Serial I/F ready output/slave-select input pin SEG43 – LCD segment output pin Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 27 SFT: Switched by software ("–" means "no software switch provided" and "D" means default function.) Note: The TEST terminal must be connected to the V power supply. Be sure to avoid applying other conditions to the terminals during normal operation. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 28: S1C63008 Pins

    SRDY_SS/P33 COM6 (SeG42) SIN/P32 COM7 (SeG41) SOUT/P31 SeG0 (SeG40) SCLK/P30 SeG1 SeG2 (SeG39) SeG3 (SeG38) SeG4 (SeG37) SeG5 (SeG36) SeG6 SeG7 N.C. SeG8 N.C. Figure 2. 2.1.1 S1C63008 pin layout diagram (QFP15-100pin/TQFP14-100pin) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 29 85 × 77 µm (No. 20 to No. 42, No. 62 to No. 85) Note: A chip thickness that exceeds 400 µm cannot be specified even if a chip other than the standard thickness type is required. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 30 -1138.5 -707.0 40 V 1138.5 731.0 82 P41 (SEG37) -1138.5 -814.0 41 V 1138.5 821.0 83 P40 (SEG36) -1138.5 -921.0 42 V 1138.5 911.0 84 V -1138.5 -1028.0 85 SEG29 -1138.5 -1118.0 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 31: S1C63008 Pin Description

    I/O port pin SFT Serial I/F data input pin SEG42 – LCD segment output pin I/o OP I/O port pin SRDY_SS SFT Serial I/F ready output/slave-select input pin SEG43 – LCD segment output pin Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 32 SFT: Switched by software ("–" means "no software switch provided" and "D" means default function.) Note: The TEST terminal must be connected to the V power supply. Be sure to avoid applying other conditions to the terminals during normal operation. Seiko epson Corporation 2-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 33: S1C63004 Pins

    P01/KRST01/KEY01/LAP SeG12 P02/KRST02/KEY02 P03/KRST03/KEY03 SeG11 SeG10 S1C63004 SeG9 ReSeT SeG8 TeST SeG7 SeG6 SeG5 OSC4 SeG4 OSC3 SeG3 SeG2 OSC2 SeG1 OSC1 SeG0 Figure 2. 3.1.1 S1C63004 pin layout diagram (QFP14-80pin) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 2-11 (Rev. 1.1)
  • Page 34 P02/KRST02/KEY02 S1C63004 P03/KRST03/KEY03 N.C. N.C. SeG7 N.C. SeG6 ReSeT SeG5 TeST SeG4 SeG3 SeG2 OSC4 SeG1 OSC3 SeG0 OSC2 N.C. OSC1 N.C. N.C. Figure 2. 3.1.2 S1C63004 pin layout diagram (TQFP14-100pin) Seiko epson Corporation 2-12 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 35 Pad opening (X × Y): 77 × 85 µm (No. 1 to No. 18, No. 39 to No. 51) 85 × 77 µm (No. 19 to No. 38, No. 52 to No. 70) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 2-13 (Rev. 1.1)
  • Page 36 32 SEG6 996.5 129.5 67 P13/KEY13/FOUT -996.5 -276.0 33 SEG5 996.5 219.5 68 P12/KEY12/BZ -996.5 -366.0 34 SEG4 996.5 309.5 69 P11/KEY11/TOUT_A -996.5 -456.0 35 SEG3 996.5 399.5 70 P10/KEY10/EVIN_A -996.5 -546.0 Seiko epson Corporation 2-14 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 37: S1C63004 Pin Description

    SFT Serial I/F data input pin SEG42 – LCD segment output pin I/o OP I/O port pin SRDY_SS SFT Serial I/F ready output/slave-select input pin SEG43 – LCD segment output pin Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 2-15 (Rev. 1.1)
  • Page 38 SFT: Switched by software ("–" means "no software switch provided" and "D" means default function.) Note: The TEST terminal must be connected to the V power supply. Be sure to avoid applying other conditions to the terminals during normal operation. Seiko epson Corporation 2-16 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 39: S1C63003 Pins

    Sen1 OSC2 (SeG53) ReF1 OSC1 (SeG52) RFin1 (SeG51) RFIN0/P53 (SeG50) REF0/P52 S1C63003 (SeG49) SEN0/P51 (SeG48) RFOUT/P50 (SeG47) (SeG46) COM0 (SeG45) COM1 (SeG44) COM2 Figure 2. 4.1.1 S1C63003 pin layout diagram (QFP12-48pin) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 2-17 (Rev. 1.1)
  • Page 40 Die No. (0, 0) 1.890 mm Figure 2. 4.1.2 S1C63003 pad layout diagram Chip thickness: 400 µm Pad opening (X × Y): 77 × 85 µm (No. 1 to No. 13, No. 26 to No. 37) 85 × 77 µm (No. 14 to No. 25, No. 38 to No. 49) Note: A chip thickness that exceeds 400 µm cannot be specified even if a chip other than the standard...

  • Page 41: S1C63003 Pin Description

    2 PinS anD PaCKaGeS 2.4.2 S1C63003 Pin Description Table 2. 4.2.1 S1C63003 pin description Pin name Pad/pin No. I/O OP SFT Function Shared Default Chip QFP12-48 function – – – Power (+) supply pin 5, 37 – – – Power (-) supply pins –...

  • Page 42: Package

    2 PinS anD PaCKaGeS Package 2.5.1 Plastic Package QFP15-100pin (S1C63008/016) (Unit: mm) INDEX 0.17–0.27 0.09–0.2 0°–10° 0.3–0.75 TQFP14-100pin (S1C63004/008/016) (Unit: mm) INDEX 0.13–0.23 0.09–0.2 0°–10° 0.3–0.75 Seiko epson Corporation 2-20 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 43 2 PinS anD PaCKaGeS QFP14-80pin (S1C63004) (Unit: mm) INDEX 0.13–0.27 0.09–0.2 0°–10° 0.3–0.75 QFP12-48pin (S1C63003) (Unit: mm) INDEX 0.13–0.27 0.09–0.2 0°–10° 0.3–0.7 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 2-21 (Rev. 1.1)

  • Page 44: Ceramic Package For Test Samples

    0.82 * Pin configuration S1C63016: Same as that of the QFP15-100pin/TQFP14-100pin plastic package. S1C63008: Same as that of the QFP15-100pin/TQFP14-100pin plastic package. S1C63004: Same as that of the TQFP14-100pin plastic package. Seiko epson Corporation 2-22 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 45 45 P12/BZ 61 P22 (SEG46) 14 COM4 30 V 46 P11/TOUT_A 62 P21 (SEG45) 15 COM3 31 N.C. 47 P10/EVIN_A 63 P20 (SEG44) 16 N.C. 32 N.C. 48 N.C. 64 N.C. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 2-23 (Rev. 1.1)

  • Page 46: Cpu And Memory

    3 CPu anD MeMORY CPU and Memory The S1C63003/004/008/016 has a 4-bit core CPU S1C63000 built-in as its CPU part. Refer to the "S1C63000 Core CPU Manual" for the S1C63000. Code Memory area 3.2.1 Code ROM The built-in code ROM is a mask ROM for loading programs.

  • Page 47: Data Memory Area

    0000H to 007FH, 0100H to 017FH Addresses 0100H to 01FFH (0100H to 017FH in the S1C63003) are 4-bit/16-bit data accessible areas and in other areas it is only possible to access 4-bit data. When programming, keep the following points in mind.

  • Page 48: Data Rom

    110 bits F000H to F03FH * These values are the maximum number of bits that can be allocated for the segment outputs. Any address within the range listed above can be specified. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 49: I/O Memory

    3.3.4 i/O Memory The peripheral circuits of S1C63003/004/008/016 (timer, I/O, etc.) are interfaced with the CPU in the memory mapped I/O method. Thus, all the peripheral circuits can be controlled by accessing the I/O memory on the memory map using the memory operation instructions.

  • Page 50: Initial Reset

    Initial Reset initial Reset Circuit The S1C63003/004/008/016 should be reset to initialize the internal circuits. There are two ways of doing this. (1) External initial reset by the RESET terminal (2) External initial reset by simultaneous high input to P00–P03 ports (mask option) The circuits are initialized by either (1) or (2).

  • Page 51: Simultaneous High Input To P0X Ports (P00-P03)

    Index register X Undefined Index register Y Undefined Program counter 0110H Stack pointer SP1 Undefined Stack pointer SP2 Undefined Zero flag Undefined Carry flag Undefined Interrupt flag Extension flag Queue register Undefined Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 52: Terminal Settings At Initial Resetting

    *2: The P30 to P33 ports, serial interface, stopwatch direct input, TOUT_B output, and EVIN_B input functions are not available in the S1C63003. *3: The P40 to P43 ports are not available in the S1C63003/004. For setting procedure of the functions, see explanations for each of the peripheral circuits.

  • Page 53: Power Supply

    (+) and V (GND). internal Power Supply Circuit The S1C63003/004/008/016 incorporates the power supply circuits shown in Figure 5.2.1 so the voltages to drive the CPU, internal logic circuits, oscillation circuits and LCD driver can be generated on the chip. interface...
  • Page 54 V . See "Electrical Characteristics" for the voltage values. In the S1C63003/004/008/016, the LCD drive voltage is supplied to the built-in LCD driver that drives the LCD panel connected to the SEG and COM terminals. The LCD system voltage regulator can be disabled by mask option to supply external voltages. In this case, ex- ternal elements can be minimized because the external capacitors for the LCD system voltage regulator are not necessary.

  • Page 55: Controlling Lcd Power Supply

    In the S1C63004/008/016, use the VCREF register to select the reference voltage with consideration given to the contrast of display in addition to the supply voltage. In the S1C63003, it can be selected by mask option. Also refer to the LCD drive voltage - supply voltage characteristics (in the “Electrical Characteristics - Characteristics Curves”...

  • Page 56: I/O Memory For Power Supply Circuit

    (in the “Electrical Characteristics - Characteristics Curves” section) and select the appropriate reference voltage according to the system. At initial reset, this register is set to "0." In the S1C63003, the reference voltage is selected by mask option. VDhlMOD: V regulator heavy load protection mode On/Off register (FF03h•D2)

  • Page 57: Precautions

    • The LCD system voltage regulator takes about 100 msec for stabilizing the LCD drive voltages after writing "1" to LPWR. • Do not select the reference voltage V for the S1C63003 1.5 V low-voltage type. • Current consumption increases in heavy load protection mode, therefore do not set heavy load protection mode with software if unnecessary.

  • Page 58: Interrupt Controller

    6 inTeRRuPT COnTROlleR Interrupt Controller Configuration of interrupt Controller The S1C63003/004/008/016 supports the interrupts listed below. Table 6. 1.1 Interrupt types Interrupt S1C63016 S1C63008 S1C63004 S1C63003 External interrupt Key input interrupt 8 systems 4 systems Internal interrupt Watchdog timer interrupt...
  • Page 59 SIP10 EIK10 IRUN – EIRUN ILAP – EILAP ISW1 EISW1 ISW10 EISW10 – EIT3 EIT2 – EIT1 – EIT0 EIT7 EIT6 – EIT5 EIT4 Figure 6. 1.1 Configuration of the interrupt circuit Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 60: Interrupt Factors

    They are enabled (interrupt authorized) when "1" is written to them, and masked (interrupt inhibited) when "0" is written to them. At initial reset, the interrupt mask register is reset to "0." Table 6.2.1 shows the correspondence between interrupt mask registers and interrupt factor flags. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 61: Interrupt Vector

    Clock timer (8 Hz, 4 Hz, 2 Hz, 1 Hz)* * The S1C63003 supports 32 Hz, 8 Hz, 2 Hz, and 1 Hz interrupts only. The four low-order bits of the program counter are indirectly addressed through the interrupt request.

  • Page 62: I/O Memory Of Interrupt Controller

    Interrupt mask register (Clock timer 2 Hz) D1 eiT5 (*6) 1 Enable 0 Mask Interrupt mask register (Clock timer 4 Hz) D0 eiT4 1 Enable 0 Mask Interrupt mask register (Clock timer 8 Hz) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 63 Interrupt factor flag (Clock timer 8 Hz) *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 ei***: interrupt mask registers (FFe1h–FFeFh) Selects whether interrupts generated by interrupt factors are masked or not.
  • Page 64 Clock timer 4 Hz (falling edge) (FFFFH•D1) EIT5 (FFEFH•D1) – Clock timer 8 Hz (falling edge) (FFFFH•D0) EIT4 (FFEFH•D0) Refer to the descriptions of the peripheral circuits for interrupt factor occurrence conditions. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 65: Precautions

    • Both the OSC1 and OSC3 oscillation circuits stop oscillating when the CPU enters SLEEP mode. To prevent the CPU from a malfunction when it resumes operating from SLEEP mode, switch the CPU clock to OSC1 before placing the CPU into SLEEP mode. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 66: Oscillation Circuit And Clock Control

    7.1.1 Configuration of Oscillation Circuit The S1C63003/004/008/016 is configured as a twin clock system with two internal oscillation circuits (OSC1 and OSC3). The OSC1 oscillation circuit generates the main-clock (Typ. 32.768 kHz) for low-power operation and the OSC3 oscillation circuit generates the sub-clock (Typ. 4.0 MHz/3 V normal type or 1.0 MHz/1.5 V low-voltage type) to run the CPU and some peripheral circuits in high speed.

  • Page 67: Osc3 Oscillation Circuit

    In the S1C63004/008/016, the oscillator type can be selected from ceramic, CR (external R), and CR (built-in R) by mask option. The S1C63003 OSC3 oscillator type is fixed at CR oscillation (built-in R). Figure 7.1.4.1 shows the configuration of the OSC3 oscillation circuit.

  • Page 68: Halt And Sleep

    2.1 Status transition diagram for clock switch over halT and SleeP The S1C63003/004/008/016 supports both HALT and SLEEP modes for power saving during standby. halT mode The CPU enters HALT mode and stops operating when it executes the HALT instruction. However, timer coun- ters and peripheral circuits continue operating since the oscillation circuit operates in HALT mode.

  • Page 69: Control Of Peripheral Circuit Clocks

    For controlling the clock manager, see the descriptions in each peripheral circuit. Clock Output (FOuT) In order for the S1C63003/004/008/016 to provide a clock signal to an external device, the FOUT signal (oscillation clock f or a dividing clock) can be output from the FOUT (P13) terminal. The FOUT output is controlled...

  • Page 70: I/O Memory For Oscillation Circuit/Clock Output Control

    0 Off *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 OSCC: OSC3 oscillation control register (FF00h•D2) Turns the OSC3 oscillation circuit on and off.

  • Page 71: Precautions

    • Both the OSC1 and OSC3 oscillation circuits stop oscillating when the CPU enters SLEEP mode. To prevent the CPU from a malfunction when it resumes operating from SLEEP mode, switch the CPU clock to OSC1 before placing the CPU into SLEEP mode. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 72: Watchdog Timer

    Configuration of Watchdog Timer The S1C63003/004/008/016 has a built-in watchdog timer that operates with a 256 Hz divided clock from the OSC1 as the source clock. The watchdog timer starts operating after initial reset, however, it can be stopped by the software.

  • Page 73: Precautions

    • Because the watchdog timer is set in operation state by initial reset, set the watchdog timer to disabled state (not used) before generating an interrupt (NMI) if it is not used. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 74: Clock Timer

    Clock Timer Configuration of Clock Timer The S1C63003/004/008/016 has a built-in clock timer that uses OSC1 (crystal oscillator) as the source oscillator. The clock timer consists of an 8-bit binary counter that counts an f dividing clock. Timer data (128–16 Hz and 8–1 OSC1 Hz) can be read out by software.

  • Page 75: Interrupt Function

    EIT7) are used to enable or mask each interrupt factor. However, regardless of the interrupt mask register setting, the interrupt factor flag is set to "1" at the falling edge of the corresponding signal. * Not supported in the S1C63003 i/O Memory of Clock Timer Table 9.5.1 shows the I/O addresses and the control bits for the clock timer.
  • Page 76 *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 RTCKe: Clock timer clock enable register (FF16h•D0) Controls the operating clock supply to the clock timer.

  • Page 77: Precautions

    • When resetting the clock timer (TMRST = "1"), do not start the clock timer (TMRUN = "1") simultaneously. If both control bits are set to "1," the clock timer may not reset properly. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 78: Stopwatch Timer

    Configuration of Stopwatch Timer The S1C63003/004/008/016 has a 1/1,000 sec stopwatch timer. The stopwatch timer is configured of a 3-stage, 4-bit BCD counter serving as the input clock of a 1,000 Hz signal output from the prescaler. Data can be read out four bits (1/1,000 sec, 1/100 sec and 1/10 sec) at a time by software.

  • Page 79: Counter And Prescaler

    In this case, it is necessary to read from SWD[3:0] again. The capture renewal flag is renewed by reading SWD[11:8]. Figure 10.4.1 shows the timing for data holding and reading. Seiko epson Corporation 10-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 80: Stopwatch Timer Run/Stop And Reset

    In the direct input function, the input ports P00 and P01 are used as the RUN/STOP and LAP input ports. The key assignment can be selected using the SWDIR register. Table 10. 6.1 RUN/STOP and LAP input ports SWDIR RUN/STOP RUN/STOP Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 10-3 (Rev. 1.1)
  • Page 81 LAP input and reading. /32 (1,024 Hz) OSC1 Direct LAP input (P01/P00) Direct LAP internal signal Data holding SWD[11:8] reading Direct LAP interrupt Figure 10. 6.2 Operating timing for direct LAP input Seiko epson Corporation 10-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 82 5. Both the RUN and LAP keys and the mask key are pressed at the same time if no other key is held down. (RUN and LAP functions are effective.) * Simultaneous key input is referred to as two or more key inputs are sampled at the same falling edge of 1,024 Hz clock. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 10-5 (Rev. 1.1)

  • Page 83: Interrupt Function

    The respective interrupts can be masked separately through the interrupt mask registers (EISW10, EISW1). However, regardless of the setting of the interrupt mask registers, the interrupt factor flags are set to "1" by the overflow of their corresponding counters. Seiko epson Corporation 10-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 84: I/O Memory Of Stopwatch Timer

    – (*2) – Unused (*6) D2 DKM2 7 P10–13 4 P10 1 P02 Key mask selection D1 DKM1 6 P10–12 3 P02–03,10 0 No mask D0 DKM0 5 P10–11 2 P02–03 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 10-7 (Rev. 1.1)
  • Page 85 *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 SWCKe: Stopwatch timer clock enable register (FF16h•D1) Controls the operating clock supply to the stopwatch timer.
  • Page 86 STOP status changes to the RUN status, the data that was maintained can be used for resuming the count. RUN/ STOP control with this register is valid only when the direct input function is set to disable (always effective in the S1C63003). When the direct input function is set, it becomes invalid. When reading data When "1"...

  • Page 87: Precautions

    • When performing a processing such as a LAP input preceding with 1 Hz interrupt processing, read the LAP data carry-up request flag LCURF before processing and check whether carry-up is needed or not. Seiko epson Corporation 10-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 88: Programmable Timer

    11.1 Configuration of Programmable Timer The S1C63004/008/016 has built-in two (Ch.A and Ch.B) units of programmable timers. The S1C63003 has a built-in single unit of programmable timer (Ch.A). The timer configurations of Ch.A and Ch.B are shown below. This module allows the software to configure timer channels.
  • Page 89 CD3[7:0] Selector PTOUT_B Output control PTSEL3 CHSEL_B Output selection PWM output selection Underflow signal (d) S1C63016 timer Ch.B (Timer 2 and Timer 3) Figure 11. 1.1 Configuration of programmable timer Seiko epson Corporation 11-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 90: Controlling Operating Clock

    11 PROGRaMMaBle TiMeR Notes: • The functions shown below are not implemented in the S1C63003 programmable timer. - Timer 1 to Timer 3 - EVIN_B input and TOUT_B output - 16-bit mode - Compare data register and comparator - PWM output function and compare match interrupt - R/F converter clock supply •...

  • Page 91: Basic Counter Operation

    I/O port to input mode and enables the port to send the input signal to Timer 0/Timer 2 as the count clock. At initial reset, EVCNT_A/EVCNT_B is set to "0" and Timer 0/Timer 2 is configured as a normal timer that counts the internal clock. Seiko epson Corporation 11-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 92 CD ≠ 0. If RLD ≤ CD, the output signal is fixed at "1" after the first underflow occurs and does not fall to "0." The generated PWM signal can be output from the TOUT_A (P11) or TOUT_B (P23) terminal (see Section 11.8). Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 11-5 (Rev. 1.1)

  • Page 93: Pwm Mode (Timers 0-3) [S1C63004/008/016]

    PWM output function must be controlled using the Timer 1 control register. Timer 1 output signal is automatically selected for the TOUT_A output (the TOUT_A output select register is ineffective). The reload data must be preset to Timer 0 and Timer 1 separately using each PTRSTx register. Seiko epson Corporation 11-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 94: Interrupt Function

    The TOUT output select register CHSEL_A/CHSEL_B allows selection of either Timer 0/Timer 2 or Timer 1/Timer 3 to be used as the TOUT output (the S1C63003 TOUT channel is fixed at Timer 0). In 16-bit timer mode, Timer 1/ Timer 3 is always selected for generating the TOUT_A/TOUT_B signal regardless of how CHSEL_A/CHSEL_B is set.

  • Page 95: I/O Memory Of Programmable Timer

    /256 4 f 0 Off D3 PTPS33 FF1BH Programmable timer 3 count clock frequency (*4) D2 PTPS32 selection (f OSC1 OSC3 D1 PTPS31 /256 D0 PTPS30 /256 4 f 0 Off Seiko epson Corporation 11-8 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 96 D1 FCSel_B 1 With noise reject 0 No noise reject PTM2 function selection (for event counter mode) 1 ↑ (positive) 0 ↓ (negative) D0 PlPul_B PTM2 pulse polarity selection (event counter mode) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 11-9 (Rev. 1.1)
  • Page 97 *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 PTPS0[3:0]: Timer 0 count clock frequency select register (FF18h) PTPS1[3:0]: Timer 1 count clock frequency select register (FF19h) –...
  • Page 98 • Upper 8-bit timer (Timer 1, Timer 3) when a timer unit is used as 16-bit × 1 channel configuration. At initial reset, these registers are set to "0." The S1C63004/008 does not include a register at FF1BH. The S1C63003 does not include registers at FF19H– FF1BH.
  • Page 99 Timer 0/Timer 2 and Timer 1/Timer 3 separately using each PTRSTx register. At initial reset, these registers are set to "0." FF90H•D3 in the S1C63004/008 and FF80H•D3 in the S1C63003 are read only bits and always "0" will be read. The S1C63003 does not include a register at FF90H.
  • Page 100 At initial reset, these registers are set to "0." FF91H•D1 in the S1C63004/008 and FF81H•D1 in the S1C63003 are read only bits and always "0" will be read. The S1C63003 does not include a register at FF91H.

  • Page 101: Precautions

    Since these bits are exclusively for writing, always set to "0" during reading. FF92H•D3 in the S1C63004/008 and FF82H•D3 in the S1C63003 are read only bits and always "0" will be read. The S1C63003 does not include a register at FF92H.
  • Page 102 - Read the count data twice and verify if there is any difference between them. - Temporarily stop the programmable timer when the counter data is read to obtain proper data. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 11-15 (Rev. 1.1)

  • Page 103: 12 I/O Ports

    12.1 Configuration of i/O Ports The S1C63003/004/008/016 is equipped with I/O ports in which the input/output direction can be switched with software. Figure 12.1.1 shows the structure of an I/O port. S1C63016: 24 bits (P00–P03, P10–P13, P20–P23, P30–P33, P40–P43, and P50–P53) S1C63008: 24 bits (P00–P03, P10–P13, P20–P23, P30–P33, P40–P43, and P50–P53)

  • Page 104: Mask Option

    S1C63003. *3: The P40 to P43 ports are not available in the S1C63003/004. When these ports are used as I/O ports, the ports can be set to either input mode or output mode individually (in 1-bit units).

  • Page 105: I/O Control Registers And Input/Output Mode

    Pull-down During input Mode A pull-down resistor that activates during the input mode can be built into the I/O ports of the S1C63003/004/008/016 by mask option. The pull-down resistor becomes effective by writing "1" to the pull-down control register PULxx that corresponds to each port, and the input line is pulled down during input mode.
  • Page 106 When a key input interrupt factor occurs, the interrupt factor flag (IK00–IK03, IK10–IK13) is set to "1." At the same time, an interrupt request is generated to the CPU if the corresponding interrupt mask register (EIK00–EIK03, EIK10–EIK13) is set to "1." Seiko epson Corporation 12-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 107: I/O Memory Of I/O Ports

    P13 I/O control register D2 iOC12 1 Output 0 Input P12 I/O control register D1 iOC11 1 Output 0 Input P11 I/O control register D0 iOC10 1 Output 0 Input P10 I/O control register Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 12-5 (Rev. 1.1)
  • Page 108 1 ↓ (falling edge) 0 ↑ (rising edge) D1 PCP01 P01 (KEY01) interrupt polarity select register 1 ↓ (falling edge) 0 ↑ (rising edge) D0 PCP00 P00 (KEY00) interrupt polarity select register Seiko epson Corporation 12-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 109 *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 P0[3:0]: P0 i/O port data register (FF20h)
  • Page 110 CMOS level input interface. At initial reset, these registers are set to "1." The input interface level of the P2 to P5 ports are fixed at a CMOS Schmitt level. Seiko epson Corporation 12-8 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 111: Precautions

    10 × C × R C: terminal capacitance 15 pF + parasitic capacitance ? pF R: pull-down resistance 500 kΩ (Max.) • Be sure to turn the noise rejector off before executing the SLP instruction. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 12-9 (Rev. 1.1)
  • Page 112 • Before the port function is configured, the circuit that uses the port (e.g. input interrupt, multiple key entry reset, serial interface, R/F converter, event counter input, direct RUN/LAP input for stopwatch) must be disabled. Seiko epson Corporation 12-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 113: Serial Interface [S1C63004/008/016]

    13 SeRial inTeRFaCe Serial Interface [S1C63004/008/016] Note: The S1C63003 has no serial interface included. 13.1 Configuration of Serial interface The S1C63004/008/016 has a built-in 8-bit clock synchronous type serial interface. The CPU, via the 8-bit shift reg- ister, can read the serial input data from the SIN terminal. Moreover, via the same 8-bit shift register, it can convert parallel data to serial data and output it to the SOUT terminal.

  • Page 114: Mask Option

    For the external master device to control data transfer, the serial interface can output a ready signal indicating that it is ready to transfer from the SRDY terminal by hardware control. Seiko epson Corporation 13-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 115 SPI slave mode SCLK (I) SOUT (O) SIN (I) SS (I) SCLK (I) P31 (I/O) SIN (I) SS (I) Serial I/F not used P30 (I/O) P31 (I/O) P32 (I/O) P33 (I/O) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 13-3 (Rev. 1.1)

  • Page 116: Setting Synchronous Clock

    At initial reset, the clock polarity is set to positive and the phase is set to the rising edge. See Figure 13.6.5.1 for the data transfer timings by the synchronous clock format selected. Seiko epson Corporation 13-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 117: Data Input/Output And Interrupt Function

    "1" after input of the 8-bit data. The data input in the shift register can be read from data registers SD[7:0] by software. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 13-5 (Rev. 1.1)

  • Page 118: Serial Data Input/Output Permutation

    Moreover, when high-order data is read from or written to SD[7:4], the SRDY signal returns to "1." 13.6.5 Timing Chart The S1C63004/008/016 serial interface timing charts are shown in Figure 13.6.5.1. Seiko epson Corporation 13-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 119 (c) When SCPS1 = "1" and SCPS0 = "0" SCTRG (W) SCTRG (R) SCLK 8-bit shift register SOUT ISIF SRDY (Slave mode) (d) When SCPS1 = "1" and SCPS0 = "1" Figure 13. 6.5.1 Serial interface timing chart Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 13-7 (Rev. 1.1)

  • Page 120: Data Transfer In Spi Mode

    • If the SS signal becomes inactive during data transfer in SPI slave mode or if the master device outputs the SCLK signal before it asserts the SS signal, the serial interface cannot transmit/ receive data normally. Seiko epson Corporation 13-8 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 121: I/O Memory Of Serial Interface

    *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 SiFCKS[2:0]: Serial interface clock frequency select register (FF14h•D[2:0]) Selects the synchronous clock frequency in master mode.
  • Page 122 (master device) from the SCLK terminal to perform serial transfer. Master mode is selected by writing "1" to SMOD, and slave mode is selected by writing "0." At initial reset, this register is set to "0." Seiko epson Corporation 13-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 123 When "0" is written: SS input Reading: Valid The P33 port function can be selected from SRDY output and SS input in slave mode (SMOD = "0"). At initial reset, this register is set to "0." Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 13-11 (Rev. 1.1)

  • Page 124: Precautions

    • Be aware that the maximum clock frequency for the serial interface is limited to 1 MHz when the programmable timer is used as the clock source or the serial interface is used in slave mode. Seiko epson Corporation 13-12 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 125: Lcd Driver

    The SEG36 to SEG55 terminals of the S1C63008/016, the SEG40 to SEG55 terminals of the S1C63004, and the SEG44 to SEG55 terminals of the S1C63003 are shared with I/O port or R/F converter, and each terminal can be set to the function to be used by mask option.

  • Page 126: Power Source For Lcd Driving

    Each of the SEG0 to SEG35 terminals of the S1C63016, the SEG0 to SEG29 terminals of the S1C63008, the SEG0 to SEG19 terminals of the S1C63004, or the SEG0 to SEG9 terminals of the S1C63003 can be configured for either segment signal output or DC output (V and V binary output) by mask option.
  • Page 127 • Leave the address cells of the pins for which "1. I/O" is selected with the "SEG/GPIO/RFC selector" option. • Enter addresses and data bits to the address cells of the pins for which "2. SEG" is selected with the "SEG/ GPIO/RFC selector" option. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 14-3 (Rev. 1.1)
  • Page 128 3. Configurations for nonexistent SEG pins (SEG30 to SEG35) • Always select "LCD segment output (S)" as the output specification of SEG30 to SEG35. • Leave the address cells for SEG30 to SEG35 blank. (Unused addresses will be allocated.) Seiko epson Corporation 14-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 129 3. Configurations for nonexistent SEG pins (SEG20 to SEG39) • Always select "LCD segment output (S)" as the output specification of SEG20 to SEG39. • Leave the address cells for SEG20 to SEG39 blank. (Unused addresses will be allocated.) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 14-5 (Rev. 1.1)
  • Page 130 D: Data bit (0–3) N: Nch open drain output notes for using the segment option generator "winsog" (S1C63003) 1. The output specification of SEG0 to SEG9 can be selected from "LCD segment output (S)," "DC complementary output (C)" and "DC Nch open drain output (N)."...

  • Page 131: Lcd Display Control

    Switching Drive Duty In the S1C63004/008/016, the drive duty can be selected from six types (1/3 to 1/8) using the LDUTY[2:0] register. In the S1C63003, the drive duty can be selected from three types (1/3 to 1/5). Table 14. 3.2.1 Drive duty settings...

  • Page 132: Drive Waveform

    The drive waveforms by duty selection are shown in Figures 14.3.4.1 to 14.3.4.6. COM0 COM1 LCD lighting status COM0 COM1 COM2 COM2 SEGxx Not lit COM3–7 SEGxx Frame Figure 14. 3.4.1 LCD drive waveform for 1/3 duty Seiko epson Corporation 14-8 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 133 14 lCD DRiVeR COM0 COM1 COM2 LCD lighting status COM0 COM1 COM2 COM3 COM3 SEGxx COM4–7 Not lit SEGxx Frame Figure 14. 3.4.2 LCD drive waveform for 1/4 duty Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 14-9 (Rev. 1.1)
  • Page 134 14 lCD DRiVeR COM0 COM1 COM2 LCD lighting status COM3 COM0 COM1 COM2 COM4 COM3 COM4 SEGxx COM5–7 Not lit SEGxx Frame Figure 14. 3.4.3 LCD drive waveform for 1/5 duty Seiko epson Corporation 14-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 135 COM0 COM1 COM2 COM3 LCD lighting status COM0 COM4 COM1 COM2 COM3 COM4 COM5 COM5 SEGxx Not lit COM6–7 SEGxx Frame Figure 14. 3.4.4 LCD drive waveform for 1/6 duty (S1C63004/008/016) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 14-11 (Rev. 1.1)
  • Page 136 COM2 COM3 COM4 LCD lighting status COM0 COM1 COM5 COM2 COM3 COM4 COM5 COM6 COM6 SEGxx Not lit COM7 SEGxx Frame Figure 14. 3.4.5 LCD drive waveform for 1/7 duty (S1C63004/008/016) Seiko epson Corporation 14-12 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 137 COM3 COM4 LCD lighting status COM0 COM1 COM2 COM5 COM3 COM4 COM5 COM6 COM6 COM7 SEGxx Not lit COM7 SEGxx Frame Figure 14. 3.4.6 LCD drive waveform for 1/8 duty (S1C63004/008/016) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 14-13 (Rev. 1.1)

  • Page 138: Static Drive

    Note: The static drive function uses all COM outputs (COM0 to COM7*) even if a duty other than 1/8 (1/5 in the S1C63003) is selected. Hence, for static drive, set the same value for all display memory corresponding to COM0 to COM7*.

  • Page 139: Display Memory

    14 lCD DRiVeR 14.4 Display Memory The display memory is located to addresses F000H–F07FH (F000H–F03FH in the S1C63003) in the data memory area and each data bit can be allocated to a segment terminal by mask option. Table 14. 4.1 Display memory...
  • Page 140 D0 lC0 *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 FlCKS[1:0]: Frame frequency select register (FF12h•D[3:2]) Selects the frequency of the frame clock supplied from the clock manager.

  • Page 141: Precautions

    Note: The static drive function uses all COM outputs (COM0 to COM7*) even if a duty other than 1/8 (1/5 in the S1C63003) is selected. Hence, for static drive, set the same value for all display memory corresponding to COM0 to COM7*. (* COM0 to COM4 in the S1C63003) lC[3:0]: lCD contrast adjustment register (FF52h) –...

  • Page 142: Sound Generator

    15.1 Configuration of Sound Generator The S1C63003/004/008/016 has a built-in sound generator for generating a buzzer signal. Hence, the generated buzzer signal can be output from the BZ terminal. Aside permitting the respective setting of the buzzer signal fre- quency and sound level to 8 stages, it permits the adding of a digital envelope by means of duty ratio control. It also has a one-shot output function for outputting key operated sounds.

  • Page 143: Buzzer Frequency And Sound Level Settings

    4.1 Duty ratio of the buzzer signal waveform Note: When a digital envelope has been added to the buzzer signal, the BDTY[2:0] settings will be invalid due to the control of the duty ratio. Seiko epson Corporation 15-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 144: Digital Envelope

    The one-shot output cannot add an envelope for short durations. However, the sound level can be set by selecting the duty ratio, and the frequency can also be set. One-shot output is invalid during normal buzzer output (during BZE = "1"). Figure 15.6.1 shows timing chart for one-shot output. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 15-3 (Rev. 1.1)

  • Page 145: I/O Memory Of Sound Generator

    *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 SGCKe: Sound generator clock enable register (FF16h•D2) Controls the clock supply to the sound generator.
  • Page 146 During reading BZSHT shows the operation status of the one-shot output circuit. During one-shot output, BZSHT becomes "1" and the output goes off, it shifts to "0." At initial reset, this bit is set to "0." Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 15-5 (Rev. 1.1)

  • Page 147: Precautions

    • The one-shot output is only valid when the normal buzzer output is off (BZE = "0") and will be invalid when the normal buzzer output is on (BZE = "1"). Seiko epson Corporation 15-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 148: F Converter

    The clock manager generates six R/F converter clocks by dividing the OSC1 and OSC3 clocks. In the S1C63003, the R/F converter clock can be selected from the above six clocks. In the S1C63004/008/016, it can be selected from seven types (the above six clocks and the programmable timer 1 output clock). Use the RFCKS[2:0] register to select one of them as shown in Table 16.2.1.

  • Page 149: Connection Terminals And Cr Oscillation Circuit

    If it is not necessary to run the R/F converter, stop the clock supply by setting RFCKS[2:0] to "0" to reduce current consumption. * The programmable timer 1 output clock cannot be used in the S1C63003. 16.3 Connection Terminals and CR Oscillation Circuit The R/F converter channel 0 input/output terminals and the RFOUT output terminal are shared with the I/O port (P50–P53), and the terminal functions must be switched with software when using these terminals for the R/F con-...
  • Page 150 REF1 RFIN1 Resistive sensor (e.g. humidity sensor) Reference resistor Channel 1 Oscillating capacitor Figure 16. 3.3 Connection diagram of resistive humidity sensor The oscillation waveform is the same as Figure 16.3.2. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 16-3 (Rev. 1.1)

  • Page 151: Operation Of R/F Conversion

    RFRUNR register is set to "0," and the R/F converter circuit stops operation com- pletely. The time base counter value should be saved into the RAM for R/F conversion of the sensor. Figure 16.4.1 shows a timing chart for the reference oscillation. Seiko epson Corporation 16-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 152 R/F conversion matches data detected by the sensor, process the difference between that value and the initial value before it is converted into a complement according to the program and calculate the target value. The above operations are shown in Figure 16.4.3. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 16-5 (Rev. 1.1)

  • Page 153: Interrupt Function

    CPU even if the interrupt factor flag is set to "1." The interrupt factor flag is reset to "0" by writing "1." Timing of interrupt by the R/F converter is shown in Figures 16.5.1 to 16.5.4. Seiko epson Corporation 16-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 154 5.4 Error interrupt due to time base counter overflow Note: When an error interrupt occurs, reset the overflow flag (OVMC or OVTC) by writing "1." The same error interrupt will occur again if the overflow flag is not reset. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 16-7 (Rev. 1.1)

  • Page 155: Continuous Oscillation Function

    × D0 TC16 *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 Seiko epson Corporation 16-8 S1C63003/004/008/016 TeChniCal Manual (Rev.
  • Page 156 If it is not necessary to run the R/F converter, stop the clock supply by setting this register to "0" to reduce current consumption. At initial reset, this register is set to "0." * The programmable timer 1 output clock cannot be used in the S1C63003. eRF[1:0]: R/F conversion select register (FF60h•D[1:0]) Selects the channel and sensor type to perform R/F conversion.
  • Page 157 If an overflow occurs while counting the oscillation of the reference resistance, OVTC is set to "1" and an error interrupt occurs at the same time. This flag is reset by writing "1" or starting R/F conversion. At initial reset, this flag is set to "0." Seiko epson Corporation 16-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 158: Precautions

    R/F converter. For the IC deviation, see "Characteristics Curves (RFC reference/sensor oscillation frequency - resistance charac- teristic)" in Chapter 19, "Electrical Characteristics." Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 16-11 (Rev. 1.1)

  • Page 159: Svd (Supply Voltage Detection) Circuit [S1C63004/008/016]

    17 SVD (SuPPlY VOlTaGe DeTeCTiOn) CiRCuiT SVD (Supply Voltage Detection) Circuit [S1C63004/008/016] Note: The S1C63003 has no SVD circuit included. 17.1 Configuration of SVD Circuit The S1C63004/008/016 has a built-in SVD (supply voltage detection) circuit, so that the software can find when the source voltage lowers.

  • Page 160: I/O Memory Of Svd Circuit

    *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 SVDS[4:0]: SVD criteria voltage setting register (FF05h•D2, FF04h) Criteria voltage for SVD is set as shown in Table 17.2.1.

  • Page 161: Integer Multiplier [S1C63008/016]

    18 inTeGeR MulTiPlieR Integer Multiplier [S1C63008/016] Note: The S1C63003/004 has no integer multiplier included. 18.1 Configuration of integer Multiplier The S1C63008/016 has a built-in unsigned-integer multiplier. This multiplier performs 8 bits × 8 bits of multiplica- tion or 16 bits ÷ 8 bits of division and returns the results and three flag states.

  • Page 162: Division Mode

    ; Set data to SR %ba, [%x]+ [%y]+, %ba ; Set data to DRL %ba, [%x]+ [%y]+, %ba ; Set data to DRH [%y], 0b0001 ; Start operation (select division mode) Seiko epson Corporation 18-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 163: I/O Memory Of Integer Multiplier

    Operation status (reading) *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 18-3 (Rev.
  • Page 164 When "1" is read: Zero When "0" is read: Not zero Writing: Invalid ZF is a read-only bit, so writing operation is invalid. At initial reset, this flag is set to "0." Seiko epson Corporation 18-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 165: Precautions

    CALMD until the operation result is set to the destination register DRH/DRL and the operation flags. While this operation is in process, do not read/write from/to the destination register DRH/DRL and do not read NF/VF/ZF. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 18-5 (Rev. 1.1)

  • Page 166: Electrical Characteristics

    – – µF *1 The capacitors are not required when LCD driver is not used. In this case, leave the V to V , CA and CB pins open. *2 S1C63004/008/016 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-1 (Rev. 1.1)

  • Page 167: Dc Characteristics

    – – -165 µA =0.2V – – µA (during DC output) *1 When CMOS level is selected as the input interface *2 P00–P13 configured as Schmitt input and other P ports Seiko epson Corporation 19-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 168: Analog Circuit Characteristics And Current Consumption

    LC[3:0]=AH 3.68 LC[3:0]=BH 3.77 LC[3:0]=CH 3.85 LC[3:0]=DH 3.94 LC[3:0]=EH 4.02 LC[3:0]=FH 4.11 Note: reference cannot be set in the 1.5 V low-voltage type, as the maximum operating voltage is 1.7 V. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-3 (Rev. 1.1)

  • Page 169: Svd Circuit [S1C63004/008/016]

    19 eleCTRiCal ChaRaCTeRiSTiCS S1C63003 lCD drive voltage (V reference) Unless otherwise specified: V =1.2 to 1.7V (1.5V type) or V =1.8 to 5.5V (3V type), V =0V, Ta=25°C, C –C =0.1µF, When a checker pattern is displayed, No panel load, A 1 MΩ load resistor is connected between V...

  • Page 170: R/F Converter Circuit

    DSPC[1:0]=All on, LC[3:0]=FH, OSC1=32kHz, – 0.45 µA LCD1 reference) =1.8 to 5.5V, VCREF=0 LCD circuit current in heavy DSPC[1:0]=All on, LC[3:0]=FH, OSC1=32kHz, – µA LCD1H load protection mode =1.8 to 5.5V, VCREF=0, VCHLMOD=1 reference) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-5 (Rev. 1.1)
  • Page 171 *3 This value is added to the current consumption during execution when the R/F converter circuit is active. *4 The LCD circuit current depends on the number of the segments used. Examples for reference: S1C63003 - 10 segments × 5 commons 0.25µA S1C63004 - 20 segments ×...
  • Page 172 Unless otherwise specified: V =1.1 to 5.5V, V =0V, Ta=25°C Item Symbol Condition Min. Typ. Max. Unit Typ. × Typ. × Oscillation frequency OSC3 0.75 1.25 Oscillation start time – – µs Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-7 (Rev. 1.1)
  • Page 173 Note that the maximum clock frequency is limited to 1 MHz. <Master mode> SCLK OUT SOUT <Slave mode> SCLK IN SOUT 19.7 Timing Chart System clock switching OSCC 10 msec min. CLKCHG * 1 instruction execution time or longer Seiko epson Corporation 19-8 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 174 = 1.8 V = 2.4 V = 3.6 V = 5.5 V 1.5 V low-voltage type Ta = 85°C, Max. value –V = 1.1 V = 1.5 V = 1.7 V Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-9 (Rev. 1.1)
  • Page 175 = 1.1 V lCD drive voltage - supply voltage characteristic (1/3 bias, V reference) [S1C63004/008/016] 3 V normal type Ta = 25°C, Typ. value LCx = FH LCx = 8H LCx = 0H Seiko epson Corporation 19-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 176 Ta = 25°C, Typ. value LCx = FH LCx = 8H LCx = 0H 1.5 V low-voltage type Ta = 25°C, Typ. value LCx = FH LCx = 8H LCx = 0H Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-11 (Rev. 1.1)
  • Page 177 - ambient temperature characteristic (1/3 bias, V reference) [S1C63004/008/016] = 3.0 V, Typ. value 1.05V 1.04V 1.03V 1.02V 1.01V 1.00V 0.99V 0.98V 0.97V 0.96V 0.95V 0.94V Ta [°C] Seiko epson Corporation 19-12 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 178 - load characteristic (1/3 bias) [S1C63003] When a load is connected to V terminal only Ta = 25°C, Typ. value 3.20 3.00 reference 2.80 2.60 reference 2.40 2.20 [µA] Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-13 (Rev. 1.1)
  • Page 179 Run state current consumption - temperature characteristic (during operation with OSC1) <Crystal oscillation, f = 32.768 khz> = 5.5 V, OSC3 = OFF, Clock manager = OFF, Typ. value OSC1 Ta [°C] Seiko epson Corporation 19-14 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 180 = 5.5 V, Ta = 25°C, Typ. value 1000 [kΩ] Oscillation frequency - resistor characteristic (OSC3) <CR oscillation (external R)> [S1C63004/008/016] 3 V normal type = 5.5 V, Ta = 25°C, Typ. value 10000 1000 1000 [kΩ] Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-15 (Rev. 1.1)
  • Page 181 = 40 kΩ, Typ. value 10000 1000 Ta [°C] Run state current consumption - temperature characteristic (during operation with OSC3) <CR oscillation (built-in R)> [S1C63004/008/016] = 5.5 V, Typ. value Ta [°C] Seiko epson Corporation 19-16 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 182 19 eleCTRiCal ChaRaCTeRiSTiCS Run state current consumption - temperature characteristic (during operation with OSC3) <CR oscillation (built-in R)> [S1C63003] = 5.5 V, Typ. value Ta [°C] Oscillation frequency - temperature characteristic (OSC3) <CR oscillation (built-in R)> [S1C63004/008/016] = 5.5 V, Typ. value Ta [°C]...
  • Page 183 = 5.5 V [kΩ] 1.5 V low-voltage type = 1000 pF, Ta = 25°C, Typ. value 10,000 1,000 = 1.1 V = 1.5 V IC deviation = 1.7 V 1,000 10,000 [kΩ] Seiko epson Corporation 19-18 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 184 = 1000 pF, Ta = 25°C, Typ. value 10,000 1,000 = 1.8 V = 3.6 V IC deviation = 5.5 V 1,000 10,000 [kΩ] 10,000 = 1.8 V 1,000 = 3.6 V IC deviation = 5.5 V [kΩ] Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-19 (Rev. 1.1)
  • Page 185 RFC reference/sensor oscillation frequency - capacitance characteristic (DC/aC oscillation mode) 3 V normal type = 100 kΩ, Ta = 25°C, Typ. value 1,000 = 1.8 V IC deviation = 3.6 V = 5.5 V 1,000 10,000 [pF] Seiko epson Corporation 19-20 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 186 RFC reference/sensor oscillation frequency - current consumption characteristic (DC/aC oscillation mode) = 1000 pF, Ta = 25°C, Typ. value 10,000 1,000 = 1.7 V = 3.6 V = 5.5 V 0.001 0.01 1,000 [kHz] Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual 19-21 (Rev. 1.1)
  • Page 187 Cres Capacitor for RESET terminal *1: S1C63003 *2: Not available in the S1C63003 *3: Not available in the S1C63003/004 *4: Not used in the S1C63003 note: The values in the above table are shown only for reference and not guaranteed.
  • Page 188 Appendix A List of I/O Registers *1 Initial value at initial reset *2 Not set in the circuit *3 Constantly "0" when being read *4 Unused in the S1C63003/004/008 *5 Unused in the S1C63003/004 *6 Unused in the S1C63003 FF00h...
  • Page 189 0 CMOS P12 input I/F level select register D1 SMT11 1 Schmitt 0 CMOS P11 input I/F level select register D0 SMT10 1 Schmitt 0 CMOS P10 input I/F level select register Seiko epson Corporation aP-a-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 190 P12(KEY12) interrupt polarity select register 1 ↓ (falling edge) 0 ↑ (rising edge) D1 PCP11 P11(KEY11) interrupt polarity select register 1 ↓ (falling edge) 0 ↑ (rising edge) D0 PCP10 P10(KEY10) interrupt polarity select register Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-a-3 (Rev. 1.1)
  • Page 191 FF4CH D3 SWD7 Stopwatch timer data D2 SWD6 BCD (1/100 sec) 0–9 D1 SWD5 D0 SWD4 FF4DH D3 SWD11 Stopwatch timer data D2 SWD10 BCD (1/10 sec) 0–9 D1 SWD9 D0 SWD8 Seiko epson Corporation aP-a-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 192 FF63H D3 MC7 Measurement counter MC4–MC7 D2 MC6 × 0H–FH D1 MC5 × D0 MC4 × FF64H D3 MC11 × Measurement counter MC8–MC11 D2 MC10 × 0H–FH D1 MC9 × × D0 MC8 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-a-5 (Rev. 1.1)
  • Page 193 0 No Overflow flag D1 ZF 1 Zero 0 No Zero flag D0 CalMD 1 Division (W) 0 Multiplication (W) Calculation mode selection (writing) Run (R) Stop (R) Operation status (reading) Seiko epson Corporation aP-a-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 194 (low-order 4 bits) 0H–FH D1 CD11 CD10 = LSB D0 CD10 D3 CD17 FF8FH Programmable timer 1 compare data D2 CD16 (*6) (high-order 4 bits) 0H–FH D1 CD15 CD17 = MSB D0 CD14 Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-a-7 (Rev. 1.1)
  • Page 195 (low-order 4 bits) 0H–FH D1 CD31 CD30 = LSB D0 CD30 D3 CD37 FF9FH Programmable timer 3 compare data D2 CD36 (*4) (high-order 4 bits) 0H–FH D1 CD35 CD37 = MSB D0 CD34 Seiko epson Corporation aP-a-8 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 196 D2 0 (*3) – (*2) – Unused D1 iPT2 1 Occurred (R) 0 Not occurred (R) Interrupt factor flag (PT2 underflow) D0 iCTC2 Reset (W) Invalid (W) Interrupt factor flag (PT2 compare match) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-a-9 (Rev. 1.1)
  • Page 197 D2 iT6 Reset (W) Invalid (W) Interrupt factor flag (Clock timer 2 Hz) D1 iT5 (*6) Interrupt factor flag (Clock timer 4 Hz) D0 iT4 Interrupt factor flag (Clock timer 8 Hz) Seiko epson Corporation aP-a-10 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 198: Appendix B Peripheral Circuit Boards For S1C6F016

    B PeRiPheRal CiRCuiT BOaRDS FOR S1C6F016 Appendix B Peripheral Circuit Boards for S1C6F016 Note: The Peripheral Circuit Boards for the S1C6F016 is used for developing S1C63003/004/008/016 applications. Download the S1C6F016 circuit data to the S1C63 Family Peripheral Circuit Board (S5U1C63000P6).
  • Page 199 1.1.3 CR oscillation frequency monitor pins (6) ReSeT switch This switch initializes the internal circuits of this board and feeds a reset signal to the ICE. (7) external part connecting socket Unused Seiko epson Corporation aP-B-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 200: S5U1C6F016P2

    Sensor (resistor) RFOUT CH 0 SEN0 REF0 Reference resistor RFIN0 Capacitor Connecting a DC-bias resistive sensor (e.g. thermistor) Figure B. 1.2.2 R/F converter monitor pins and external part connecting socket (Channel 0) Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-B-3 (Rev. 1.1)
  • Page 201 SVDS[4:0] = 0H to 0FH, the monitor LED/pin goes off/goes high; to check the SVD operation when SVDS[4:0] = 10H to 1FH, the monitor LED/pin lights/goes low. • The S1C63003 has no SVD circuit included. (5) SVD result leD (leD1) This LED indicates the SVD results according to the SW1 and SW2 settings.

  • Page 202: Connecting To The Target System

    To connect the S5U1C63000P6 and S5U1C6F016P2 to the target system, use the I/O connecting cables supplied with these boards. Take care when handling the connectors, since they conduct electrical power (V = +3.3 V). Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-B-5 (Rev. 1.1)
  • Page 203 18 P11 38 Cannot be connected 18 Cannot be connected 38 RESET 19 P12 39 V 19 Cannot be connected 39 V 20 P13 40 V 20 Cannot be connected 40 V Seiko epson Corporation aP-B-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 204 23 Cannot be connected 48 Cannot be connected 24 SEG15 49 SEG40 24 Cannot be connected 49 Cannot be connected 25 SEG16 50 SEG41 25 Cannot be connected 50 Cannot be connected Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-B-7 (Rev. 1.1)

  • Page 205: Downloading To S5U1C63000P6

    7 Cannot be connected 8 Cannot be connected 10 V Notes: • When developing an S1C63003 application, the connector pins shown below should not be connected to the target board. 40-pin CN1-1: No. 27–30 (P30–P33), No. 33–36 (P40–P43) 50-pin CN2-1: No. 15–20 (SEG10–SEG15), No. 23–30 (SEG16–SEG23), No.

  • Page 206: Usage Precautions

    The amount of current consumed by this tool is different significantly from that of the actual IC. Inspecting the LEDs on S5U1C63000P6 may help you keep track of approximate current consumption. The following factors/ components greatly affect device current consumption: Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-B-9 (Rev. 1.1)
  • Page 207 IC. Note that the ICE incorporates the program break function caused by accessing to an undefined address space. Note: In the S1C63003, no program break occurs when an undefined address space from 0080H to 00FFH is accessed. Therefore, set a data break condition to this area or take other measures when creating the program.
  • Page 208 R = 50 kΩ 1,000,000 100,000 10,000 1,000 1,000 2,200 4,700 Capacitance [pF] R/F converter oscillation frequency - resistance characteristic (reference value) C = 1000 pF 1,000,000 100,000 10,000 1,000 1,000 Resistance [kΩ] Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-B-11 (Rev. 1.1)

  • Page 209: Product Specifications

    Length: Approx. 40 cm accessories 10-pin connector for connecting to target system: 3M3662-6002LCPL × 1 Discreet platform (for mounting external resistors and capacitors of the R/F converter): DIS12-016-403 (KEL) × 2 Seiko epson Corporation aP-B-12 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 210: Appendix C Power Saving

    Current consumption will vary dramatically, depending on CPU operating mode, operation clock frequency, and the peripheral circuits being operated. Listed below are the control methods for saving power. Power Saving by Clock Control Figure C.1.1 illustrates the S1C63003/004/008/016 clock system. Oscillation circuit OSC1...
  • Page 211 Peripheral circuit clocks • Stop clock supply to the peripheral circuits (clock manager) The S1C63003/004/008/016 incorporates a clock manager to control the clock supply to the peripheral circuits. Stop the clock supply to the unused peripheral circuits to reduce current consumption.

  • Page 212: Power Saving By Power Supply Control

    • If no LCD display is being used, turn off the LCD system voltage regulator. Supply voltage detection (SVD) circuit [S1C63004/008/016] • Operating the SVD circuit will increase current consumption. Turn off power supply voltage detection unless it is required. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-C-3 (Rev. 1.1)

  • Page 213: Appendix D Mask Data Creation Procedure

    Appendix D Mask Data Creation Procedure This chapter shows a procedure to create an S1C630 Series (S1C63003/004/008/016) mask data file (PAx) for sub- mission to Seiko Epson. Use the appropriate device information definition file according to the model to be used.

  • Page 214: Mask Data File Creation Procedure

    Select "Device INI select" from the "Tool (T)" menu or click the "Device INI select" button. When the dialog box appears, select the folder and file for the target model. • Folder: 630xx • File: 630xx.INI Seiko epson Corporation aP-D-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 215 If there is a such assignment as above, create the segment option file and mask data with the correct assignment once again using the latest device information definition file. *2 Included in the device information definition file package downloaded. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-D-3 (Rev. 1.1)

  • Page 216: Appendix E Summary Of Notes

    16-bit data (SP1). 16-bit data are accessed in stack handling by SP1, therefore, this stack area should be al- located to the area where 4-bit/16-bit access is possible (0100H to 01FFH, 0100H to 017FH in the S1C63003). Memory accesses except for stack operations by SP1 are 4-bit data access.
  • Page 217 PTRUNx register. Consequently, when "0" is written to the PTRUNx register, the timer enters STOP status at the point where the counter is decremented (-1). The PTRUNx register maintains "1" for reading until the timer actually stops. Seiko epson Corporation aP-e-2 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)
  • Page 218 Particular care needs to be taken of the key scan during key matrix configuration. Make this waiting time the amount of time or more calculated by the following expression. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-e-3 (Rev. 1.1)
  • Page 219 • When an error interrupt occurs, reset the overflow flag (OVMC or OVTC) by writing "1." The same error inter- rupt will occur again if the overflow flag is not reset. Seiko epson Corporation aP-e-4 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 220: Precautions On Mounting

    • In order to prevent any occurrences of unnecessary resetting caused by noise during operating, components such as capacitors and resistors should be connected to the RESET terminal in the shortest line. Seiko epson Corporation S1C63003/004/008/016 TeChniCal Manual aP-e-5 (Rev. 1.1)
  • Page 221 (4) After the shielded package has been opened, the IC chip should be bonded on the board within one week. If the IC chip must be stored after the package has been opened, be sure to shield the IC from visible radiation. Seiko epson Corporation aP-e-6 S1C63003/004/008/016 TeChniCal Manual (Rev. 1.1)

  • Page 222: Revision History

    412158901a 14-2 Segment allocation (Old) Note: Refer to "Generating S1C63003 Mask Data" in the Appendix when generating an application using the S1C63003. (New) Note: Refer to Appendix D, "Mask Data Creation Procedure," for mask data creation including seg- ment allocation and precautions.
  • Page 223 KOnG lTD. Unit 715-723, 7/F Trade Square, 681 Cheung Sha Wan Road, Kowloon, Hong Kong Phone: +852-2585-4600 Fax: +852-2827-4346 ePSOn TaiWan TeChnOlOGY & TRaDinG lTD. 14F, No. 7, Song Ren Road, Taipei 110, TAIWAN Phone: +886-2-8786-6688 Fax: +886-2-8786-6660 ePSOn SinGaPORe PTe., lTD.

This manual is also suitable for:

S1c63004S1c63008S1c63016

Table of Contents