T16B Ch.n Counter Status Register - Epson S1C31D50 Technical Manual

Cmos 32-bit single chip
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17 16-BIT PWM TIMERS (T16B)
Bits 15–0 TC[15:0]
The current counter value can be read out through these bits.

T16B Ch.n Counter Status Register

Register name
Bit
T16B_nCS
15–8 –
7
6
5
4
3
2
1
0
Bits 15–8 Reserved
Bit 7
CAPI5
Bit 6
CAPI4
Bit 5
CAPI3
Bit 4
CAPI2
Bit 3
CAPI1
Bit 2
CAPI0
These bits indicate the signal level currently input to the CAPnm pin.
1 (R):
Input signal = High level
0 (R):
Input signal = Low level
The following shows the correspondence between the bit and the CAPnm pin:
T16B_nCS.CAPI5 bit: CAPn5 pin
T16B_nCS.CAPI4 bit: CAPn4 pin
T16B_nCS.CAPI3 bit: CAPn3 pin
T16B_nCS.CAPI2 bit: CAPn2 pin
T16B_nCS.CAPI1 bit: CAPn1 pin
T16B_nCS.CAPI0 bit: CAPn0 pin
Note: The configuration of the T16B_nCS.CAPIm bits depends on the model. The bits corre-
sponding to the CAPnm pins that do not exist are read-only bits and are always fixed at 0.
Bit 1
UP_DOWN
This bit indicates the currently set count direction.
1 (R):
Count up
0 (R):
Count down
Bit 0
BSY
This bit indicates the counter operating status.
1 (R):
Running
0 (R):
Idle
17-26
Bit name
Initial
0x00
CAPI5
0
CAPI4
0
CAPI3
0
CAPI2
0
CAPI1
0
CAPI0
0
UP_DOWN
1
BSY
0
Seiko Epson Corporation
Reset
R/W
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
S1C31D50/D51 TECHNICAL MANUAL
Remarks
(Rev. 2.00)

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