7.7.13 Common Registers between Port Groups
Table 7.7.13.1 Control Registers for Common Use with Port Groups
Register name
Bit
PPORTCLK
15–9 –
(P Port Clock Control
8
Register)
7–4 CLKDIV[3:0]
3–2 –
1–0 CLKSRC[1:0]
PPORTINTFGRP
15–11 –
(P Port Interrupt Flag
10
Group Register)
9
8
7
6
5
4
3
2
1
0
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Bit name
Initial
0x00
DBRUN
0
0x0
0x0
0x0
0x0
PAINT
0
P9INT
0
P8INT
0
P7INT
0
P6INT
0
P5INT
0
P4INT
0
P3INT
0
P2INT
0
P1INT
0
P0INT
0
Seiko Epson Corporation
Reset
R/W
Remarks
–
R
–
H0
R/WP –
H0
R/WP
–
R
–
H0
R/WP –
–
R
–
–
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
7 I/O PORTS (PPORT)
48
64
80
100
pin
pin
pin
pin
–
–
–
–
✓
✓
✓
✓
✓
✓
✓
✓
–
–
–
–
✓
✓
✓
✓
–
–
–
–
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
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