Epson S1C31D50 Technical Manual page 416

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address Register name
0x0020 RFC_0TRG
0844 (RFC Ch.0 Oscillation
Trigger Register)
0x0020 RFC_0MCL
0846
(RFC Ch.0 Measure-
ment Counter Low
Register)
0x0020 RFC_0MCH
0848 (RFC Ch.0 Measure-
ment Counter High
Register)
0x0020 RFC_0TCL
084a
(RFC Ch.0 Time Base
Counter Low Register)
0x0020 RFC_0TCH
084c (RFC Ch.0 Time Base
Counter High Register)
0x0020 RFC_0INTF
084e (RFC Ch.0 Interrupt
Flag Register)
0x0020 RFC_0INTE
0850 (RFC Ch.0 Interrupt
Enable Register)
0x0020 0860–0x0020 086a
Address Register name
0x0020 SDACCLK
0860 (SDAC Clock Control
Register)
0x0020 SDACCTL
0862 (SDAC Control
Register)
0x0020 SDACMOD
0864 (SDAC Mode
Register)
0x0020 SDACDAT
0866 (SDAC Data Register)
0x0020 SDACINTF
0868 (SDAC Interrupt Flag
Register)
0x0020 SDACINTE
086a (SDAC Interrupt
Enable Register)
AP-A-52
Bit Bit name
15–8 –
7–3 –
2 SSENB
1 SSENA
0 SREF
15–0 MC[15:0]
15–8 –
7–0 MC[23:16]
15–0 TC[15:0]
15–8 –
7–0 TC[23:16]
15–8 –
7–5 –
4 OVTCIF
3 OVMCIF
2 ESENBIF
1 ESENAIF
0 EREFIF
15–8 –
7–5 –
4 OVTCIE
3 OVMCIE
2 ESENBIE
1 ESENAIE
0 EREFIE
Bit Bit name
15–9 –
8 DBRUN
7–6 –
5–4 CLKDIV[1:0]
3–2 –
1–0 CLKSRC[1:0]
15–8 –
7–1 –
0 SDACEN
15–9 –
8 PWMOUTEN
7–1 –
0 MODE
15–10 –
9–0 DAT[9:0]
15–8 –
7–2 –
1 ERRIF
0 DATREQIF
15–8 –
7–2 –
1 ERRIE
0 DATREQIE
Seiko Epson Corporation
Initial Reset R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x0000 H0 R/W
0x00 – R
0x00 H0 R/W
0x0000 H0 R/W
0x00 – R
0x00 H0 R/W
0x00 – R
0x0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 – R
0x0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
Initial Reset R/W
0x00 – R
0 H0 R/W
0x0 – R
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0x00 H0 R
0 H0 R/W
0x00 – R
0x000 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
S1C31D50/D51 TECHNICAL MANUAL
Remarks
–
–
–
–
–
–
Cleared by writing 1.
–
Sound DAC (SDAC)
Remarks
–
–
–
–
–
Cleared by writing 1.
–
(Rev. 2.00)