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Peripheral circuit
16-bit timer (T16) Ch.4
16-bit timer (T16) Ch.5
Synchronous serial interface
(SPIA) Ch.2
UART (UART3) Ch.1
UART (UART3) Ch.2
16-bit timer (T16) Ch.6
Synchronous serial interface
(SPIA) Ch.1
16-bit timer (T16) Ch.2
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Address
0x0020 04a4 T16_4CTL
0x0020 04a6 T16_4TR
0x0020 04a8 T16_4TC
0x0020 04aa T16_4INTF
0x0020 04ac T16_4INTE
0x0020 04c0 T16_5CLK
0x0020 04c2 T16_5MOD
0x0020 04c4 T16_5CTL
0x0020 04c6 T16_5TR
0x0020 04c8 T16_5TC
0x0020 04ca T16_5INTF
0x0020 04cc T16_5INTE
0x0020 04d0 SPIA_2MOD
0x0020 04d2 SPIA_2CTL
0x0020 04d4 SPIA_2TXD
0x0020 04d6 SPIA_2RXD
0x0020 04d8 SPIA_2INTF
0x0020 04da SPIA_2INTE
0x0020 04dc SPIA_2TBEDMAEN SPIA Ch.2 Transmit Buffer Empty DMA Request Enable Register
0x0020 04de SPIA_2RBFDMAEN SPIA Ch.2 Receive Buffer Full DMA Request Enable Register
0x0020 0600 UART3_1CLK
0x0020 0602 UART3_1MOD
0x0020 0604 UART3_1BR
0x0020 0606 UART3_1CTL
0x0020 0608 UART3_1TXD
0x0020 060a UART3_1RXD
0x0020 060c UART3_1INTF
0x0020 060e UART3_1INTE
0x0020 0610 UART3_1
TBEDMAEN
0x0020 0612 UART3_1
RB1FDMAEN
0x0020 0614 UART3_1CAWF
0x0020 0620 UART3_2CLK
0x0020 0622 UART3_2MOD
0x0020 0624 UART3_2BR
0x0020 0626 UART3_2CTL
0x0020 0628 UART3_2TXD
0x0020 062a UART3_2RXD
0x0020 062c UART3_2INTF
0x0020 062e UART3_2INTE
0x0020 0630 UART3_2
TBEDMAEN
0x0020 0632 UART3_2
RB1FDMAEN
0x0020 0634 UART3_2CAWF
0x0020 0660 T16_6CLK
0x0020 0662 T16_6MOD
0x0020 0664 T16_6CTL
0x0020 0666 T16_6TR
0x0020 0668 T16_6TC
0x0020 066a T16_6INTF
0x0020 066c T16_6INTE
0x0020 0670 SPIA_1MOD
0x0020 0672 SPIA_1CTL
0x0020 0674 SPIA_1TXD
0x0020 0676 SPIA_1RXD
0x0020 0678 SPIA_1INTF
0x0020 067a SPIA_1INTE
0x0020 067c SPIA_1TBEDMAEN SPIA Ch.1 Transmit Buffer Empty DMA Request Enable Register
0x0020 067e SPIA_1RBFDMAEN SPIA Ch.1 Receive Buffer Full DMA Request Enable Register
0x0020 0680 T16_2CLK
0x0020 0682 T16_2MOD
0x0020 0684 T16_2CTL
0x0020 0686 T16_2TR
Seiko Epson Corporation
Register name
T16 Ch.4 Control Register
T16 Ch.4 Reload Data Register
T16 Ch.4 Counter Data Register
T16 Ch.4 Interrupt Flag Register
T16 Ch.4 Interrupt Enable Register
T16 Ch.5 Clock Control Register
T16 Ch.5 Mode Register
T16 Ch.5 Control Register
T16 Ch.5 Reload Data Register
T16 Ch.5 Counter Data Register
T16 Ch.5 Interrupt Flag Register
T16 Ch.5 Interrupt Enable Register
SPIA Ch.2 Mode Register
SPIA Ch.2 Control Register
SPIA Ch.2 Transmit Data Register
SPIA Ch.2 Receive Data Register
SPIA Ch.2 Interrupt Flag Register
SPIA Ch.2 Interrupt Enable Register
UART3 Ch.1 Clock Control Register
UART3 Ch.1 Mode Register
UART3 Ch.1 Baud-Rate Register
UART3 Ch.1 Control Register
UART3 Ch.1 Transmit Data Register
UART3 Ch.1 Receive Data Register
UART3 Ch.1 Status and Interrupt Flag Register
UART3 Ch.1 Interrupt Enable Register
UART3 Ch.1 Transmit Buffer Empty DMA Request Enable Register
UART3 Ch.1 Receive Buffer One Byte Full DMA Request Enable
Register
UART3 Ch.1 Carrier Waveform Register
UART3 Ch.2 Clock Control Register
UART3 Ch.2 Mode Register
UART3 Ch.2 Baud-Rate Register
UART3 Ch.2 Control Register
UART3 Ch.2 Transmit Data Register
UART3 Ch.2 Receive Data Register
UART3 Ch.2 Status and Interrupt Flag Register
UART3 Ch.2 Interrupt Enable Register
UART3 Ch.2 Transmit Buffer Empty DMA Request Enable Register
UART3 Ch.2 Receive Buffer One Byte Full DMA Request Enable
Register
UART3 Ch.2 Carrier Waveform Register
T16 Ch.6 Clock Control Register
T16 Ch.6 Mode Register
T16 Ch.6 Control Register
T16 Ch.6 Reload Data Register
T16 Ch.6 Counter Data Register
T16 Ch.6 Interrupt Flag Register
T16 Ch.6 Interrupt Enable Register
SPIA Ch.1 Mode Register
SPIA Ch.1 Control Register
SPIA Ch.1 Transmit Data Register
SPIA Ch.1 Receive Data Register
SPIA Ch.1 Interrupt Flag Register
SPIA Ch.1 Interrupt Enable Register
T16 Ch.2 Clock Control Register
T16 Ch.2 Mode Register
T16 Ch.2 Control Register
T16 Ch.2 Reload Data Register
4 MEMORY AND BUS
4-7
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