Epson S1C31D50 Technical Manual page 323

Cmos 32-bit single chip
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When the volume returns back to the original level, a smoothing (fade-in) process for the playback output
signal is carried out to suppress the occurrence of noise due to a sudden rise of the signal.
Figure 21.4.1.4 Smoothing Process when Playback Output is Resumed
When sound data ends in mute state
End of sound data automatically stops the muted playback output and the sound play function transits to sp_
state_idle state. If the HWPINTF.HWP0IF bit is set to 1 (occurrence of state transition) before releasing the
mute state, read the STATE_n.STATE[15:0] bits and check to see if they are set to 0x0001 (sp_state_idle).
Pause
Pause control
During playback, it can be paused with the procedure shown below.
1. Confirm that the STATE_n.STATE[15:0] bits = 0x0002 (sp_state_play).
2. Confirm that the STATUS.READY bit = 1.
3. Set the COMMAND_n.COMMAND[7:0] bits to 0x04 or 0x05.*
4. Write 1 to the HWPCMDTRG.HWP0TRG bit.
5. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
The HWP pauses the playback output from this point.
6. Confirm that the STATE_n.STATE[15:0] bits = 0x0003 (sp_state_pause) as necessary.
7. Write 0 to the HWPINTF.HWP0IF bit.
* Two pause commands are available. Setting the COMMAND_n.COMMAND[7:0] bits to 0x04 selects
the Pause Immediately command; setting to 0x05 selects the Pause after Current Phrase command.
Pause Immediately command
When this command is issued by the trigger bit, the playback output is paused immediately. At this
time, a smoothing (fade-out) process for the playback output signal is carried out to suppress the occur-
rence of noise. (See Figure 21.4.1.2.)
Pause after Current Phrase command
The playback output is paused after ending the phrase that is being output when the command is issued.
(See Figure 21.4.1.3.)
Pause release
The pause state can be released with the procedure shown below.
1. Confirm that the STATE_n.STATE[15:0] bits = 0x0003 (sp_state_pause).
2. Confirm that the STATUS.READY bit = 1.
3. Set the COMMAND_n.COMMAND[7:0] bits to 0x06.
4. Write 1 to the HWPCMDTRG.HWP0TRG bit.
5. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
The HWP resumes playback output from this point.
6. Confirm that the STATE_n.STATE[15:0] bits = 0x0002 (sp_state_play) as necessary.
7. Write 0 to the HWPINTF.HWP0IF bit.
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Sound level
Smoothing process
Command execution
(Release Mute/Pause command)
Seiko Epson Corporation
21 HW Processor (HWP) and Sound Output
Time
(Command acceptable)
(Select Pause command)
(Trigger to issue command)
(Occurrence of state transition)
(Clear interrupt flag)
(Command acceptable)
(Select Release Pause command)
(Trigger to issue command)
(Occurrence of state transition)
(Clear interrupt flag)
21-11

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