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APPENDIX C MOUNTING PRECAUTIONS
(2) If a bypass capacitor is connected between V
between the V
and V
DD
Signal line location
• To prevent electromagnetically-induced noise arising from mutual
induction, large-current signal lines should not be positioned close to pins
susceptible to noise, such as oscillator and analog measurement pins.
• Locating signal lines in parallel over significant distances or crossing sig-
nal lines operating at high speed will cause malfunctions due to noise gen-
erated by mutual interference.
Unused pins
(1) I/O port (P) pins
Unused pins should be left open. The control registers should be fixed at the initial status.
(2) OSC1, OSC2, OSC3, OSC4, and EXOSC pins
If the OSC1 crystal oscillator circuit is not used, the OSC1 and OSC2 pins should be left open. If the OSC3
crystal/ceramic oscillator circuit or EXOSC input circuit is not used, the pin should be configured as a
general-purpose I/O port. The control registers should be fixed at the initial status (disabled).
Miscellaneous
Minor variations over time may result in electrical damage arising from disturbances in the form of voltages
exceeding the absolute maximum rating when mounting the product in addition to physical damage. The fol-
lowing factors can give rise to these variations:
(1) Electromagnetically-induced noise from industrial power supplies used in mounting reflow, reworking after
mounting, and individual characteristic evaluation (testing) processes
(2) Electromagnetically-induced noise from a solder iron when soldering
In particular, during soldering, take care to ensure that the soldering iron GND (tip potential) has the same po-
tential as the IC GND.
AP-C-2
DD
pins should be as short as possible.
SS
Seiko Epson Corporation
and V
, connections
SS
Bypass capacitor connection example
C
PW1
Prohibited pattern
S1C31D50/D51 TECHNICAL MANUAL
V
V
DD
DD
V
V
SS
SS
C
PW1
OSC1
OSC2
Large current signal line
High-speed signal line
(Rev. 2.00)
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