Epson Buzzer S1C31D51 Manuals

Manuals and User Guides for Epson Buzzer S1C31D51. We have 5 Epson Buzzer S1C31D51 manuals available for free PDF download: Technical Manual, Application Note, Manual, Getting Started

Epson Buzzer S1C31D51 Technical Manual (425 pages)

CMOS 32-BIT SINGLE CHIP

Brand: Epson | Category: Microcontrollers | Size: 11 MB

Table of Contents
4
1 Overview

16
- Features
  16
- Block Diagram
  18
- Pins
  19
  - Pin Configuration Diagram
    19
  - Pin Descriptions
    23
2 Power Supply, Reset, and Clocks

27
- Power Generator (PWGA)
  27
  - Overview
    27
  - Pins
    27
  - D1 Regulator Operation Mode
    28
  - D1 Regulator Voltage Mode
    28
- System Reset Controller (SRC)
  29
  - Overview
    29
  - Input Pin
    30
  - Reset Sources
    30
  - Initialization Conditions (Reset Groups)
    31
- Clock Generator (CLG)
  31
  - Overview
    31
  - Input/Output Pins
    32
  - Clock Sources
    32
  - Operations
    35
- Operating Mode
  39
  - Initial Boot Sequence
    39
  - Transition between Operating Modes
    39
- Interrupts
  41
- Control Registers
  41
  - PWGA Control Register
    41
  - CLG System Clock Control Register
    42
  - CLG Oscillation Control Register
    43
  - CLG IOSC Control Register
    44
  - CLG OSC1 Control Register
    44
  - CLG OSC3 Control Register
    45
  - CLG Interrupt Flag Register
    47
  - CLG Interrupt Enable Register
    47
  - CLG FOUT Control Register
    48
3 CPU and Debugger

49
- Overview
  49
- CPU Core
  49
- Debugger
  49
  - List of Debugger Input/Output Pins
    49
  - External Connection
    49
4 Memory and Bus

50
- Overview
  50
- Bus Access Cycle
  51
- Flash Memory
  51
  - Flash Memory Pin
    51
  - Flash Bus Access Cycle Setting
    51
  - Flash Programming
    51
- Ram
  52
- Peripheral Circuit Control Registers
  52
  - System-Protect Function
    58
- Instruction Cache
  58
- Memory Mapped Access Area for External Flash Memory
  59
- Control Registers
  59
5 Interrupt

60
- Overview
  60
- Vector Table
  60
  - Vector Table Offset Address (VTOR)
    62
  - Priority of Interrupts
    62
- Peripheral Circuit Interrupt Control
  62
- Nmi
  63
6 DMA Controller (DMAC)

64
- Overview
  64
- Operations
  65
  - Initialization
    65
- Priority
  65
- Data Structure
  65
  - Transfer Source End Pointer
    66
  - Transfer Destination End Pointer
    66
  - Control Data
    66
- DMA Transfer Mode
  68
  - Basic Transfer
    68
  - Auto-Request Transfer
    68
  - Ping-Pong Transfer
    69
  - Memory Scatter-Gather Transfer
    70
  - Peripheral Scatter-Gather Transfer
    71
- DMA Transfer Cycle
  72
- Interrupts
  72
- Control Registers
  73
7 O Ports (PPORT)

79
- Overview
  79
- I/O Cell Structure and Functions
  80
- Clock Settings
  81
- Operations
  82
  - Initialization
    82
  - Port Input/Output Control
    83
- Interrupts
  84
- Control Registers
  85
- Control Register and Port Function Configuration of this IC
  90
  - P0 Port Group
    90
  - P1 Port Group
    92
  - P2 Port Group
    95
  - P3 Port Group
    97
  - P4 Port Group
    99
  - P5 Port Group
    102
  - P6 Port Group
    104
  - P7 Port Group
    106
  - P8 Port Group
    109
  - P9 Port Group
    111
  - Pa Port Group
    113
  - Pd Port Group
    115
  - Common Registers between Port Groups
    117
8 Universal Port Multiplexer (UPMUX)

118
- Overview
  118
- Peripheral Circuit I/O Function Assignment
  118
- Control Registers
  119
  - Pxy-Xz Universal Port Multiplexer Setting Register
    119
9 Watchdog Timer (WDT2)

120
- Overview
  120
- Clock Settings
  120
  - WDT2 Operating Clock
    120
  - Clock Supply in DEBUG Mode
    120
- Operations
  121
  - WDT2 Control
    121
  - Operations in HALT and SLEEP Modes
    122
- Control Registers
  122
  - WDT2 Clock Control Register
    122
  - WDT2 Control Register
    123
  - WDT2 Counter Compare Match Register
    123
10 Real-Time Clock (RTCA)

125
- Overview
  125
- Output Pin and External Connection
  125
  - Output Pin
    125
- Clock Settings
  126
  - RTCA Operating Clock
    126
  - Theoretical Regulation Function
    126
- Operations
  127
  - RTCA Control
    127
  - Real-Time Clock Counter Operations
    128
  - Stopwatch Control
    128
  - Stopwatch Count-Up Pattern
    128
- Interrupts
  129
- Control Registers
  130
  - RTCA Control Register (Low Byte)
    130
  - RTCA Control Register (High Byte)
    131
  - RTCA Second Alarm Register
    131
  - RTCA Hour/Minute Alarm Register
    132
  - RTCA Stopwatch Control Register
    132
  - RTCA Second/1Hz Register
    133
  - RTCA Hour/Minute Register
    134
  - RTCA Month/Day Register
    135
  - RTCA Year/Week Register
    135
  - RTCA Interrupt Flag Register
    136
  - RTCA Interrupt Enable Register
    137
11 Supply Voltage Detector (SVD3)

139
- Overview
  139
- Input Pins and External Connection
  140
  - Input Pins
    140
  - External Connection
    140
- Clock Settings
  140
  - SVD3 Operating Clock
    140
  - Clock Supply in SLEEP Mode
    140
  - Clock Supply in DEBUG Mode
    141
- Operations
  141
  - SVD3 Control
    141
  - SVD3 Operations
    142
- SVD3 Interrupt and Reset
  142
  - SVD3 Interrupt
    142
  - SVD3 Reset
    143
- Control Registers
  143
16-Bit Timers (T16)

147
- Overview
  147
- Input Pin
  147
- Clock Settings
  148
  - T16 Operating Clock
    148
  - Clock Supply in SLEEP Mode
    148
  - Clock Supply During Debugging
    148
  - Event Counter Clock
    148
- Operations
  148
  - Initialization
    148
  - Counter Underflow
    149
  - Operations in Repeat Mode
    149
  - Operations in One-Shot Mode
    149
  - Counter Value Read
    150
- Interrupt
  150
- Control Registers
  150
  - T16 Ch.n Clock Control Register
    150
  - T16 Ch.n Control Register
    151
  - T16 Ch.n Reload Data Register
    152
  - T16 Ch.n Counter Data Register
    152
  - T16 Ch.n Interrupt Flag Register
    152
  - T16 Ch.n Interrupt Enable Register
    153
13 Uart (Uart3)

154
- Overview
  154
- Input/Output Pins and External Connections
  155
  - List of Input/Output Pins
    155
  - External Connections
    155
  - Input Pin Pull-Up Function
    155
  - Output Pin Open-Drain Output Function
    155
  - Input/Output Signal Inverting Function
    155
- Clock Settings
  155
  - UART3 Operating Clock
    155
  - Clock Supply in SLEEP Mode
    156
  - Clock Supply During Debugging
    156
  - Baud Rate Generator
    156
- Data Format
  156
- Operations
  157
  - Initialization
    157
  - Data Transmission
    158
  - Data Reception
    159
  - Carrier Modulation
    161
- Receive Errors
  162
  - Framing Error
    162
  - Parity Error
    162
  - Overrun Error
    162
- Interrupts
  163
- DMA Transfer Requests
  163
- Control Registers
  164
14 Synchronous Serial Interface (SPIA)

170
- Overview
  170
- Input/Output Pins and External Connections
  171
  - List of Input/Output Pins
    171
  - External Connections
    171
  - Pin Functions in Master Mode and Slave Mode
    172
  - Input Pin Pull-Up/Pull-Down Function
    172
- Clock Settings
  172
  - SPIA Operating Clock
    172
  - Clock Supply During Debugging
    173
  - SPI Clock (Spiclkn) Phase and Polarity
    173
- Data Format
  174
- Operations
  174
  - Initialization
    174
  - Data Transmission in Master Mode
    175
  - Data Reception in Master Mode
    177
  - Terminating Data Transfer in Master Mode
    179
  - Data Transfer in Slave Mode
    179
  - Terminating Data Transfer in Slave Mode
    180
- Interrupts
  181
- DMA Transfer Requests
  182
- Control Registers
  182
15 Quad Synchronous Serial Interface (QSPI)

186
- Overview
  186
- Input/Output Pins and External Connections
  187
  - List of Input/Output Pins
    187
  - External Connections
    187
  - Pin Functions in Master Mode and Slave Mode
    191
  - Input Pin Pull-Up/Pull-Down Function
    191
- Clock Settings
  191
  - QSPI Operating Clock
    191
  - Clock Supply During Debugging
    192
  - QSPI Clock (Qspiclkn) Phase and Polarity
    192
- Data Format
  193
  - Register Access Mode
    194
  - Memory Mapped Access Mode
    195
  - Initialization
    196
  - Data Transmission in Master Mode
    197
  - Data Reception in Register Access Master Mode
    199
  - Data Reception in Memory Mapped Access Mode
    202
  - Terminating Memory Mapped Access Operations
    210
  - Terminating Data Transfer in Master Mode
    210
  - Data Transfer in Slave Mode
    211
  - Terminating Data Transfer in Slave Mode
    212
- Interrupts
  212
- DMA Transfer Requests
  213
- Control Registers
  214
100 C (I2C)

223
- Overview
  223
- Input/Output Pins and External Connections
  224
  - List of Input/Output Pins
    224
  - External Connections
    224
- Clock Settings
  225
  - I2C Operating Clock
    225
  - Clock Supply During Debugging
    225
  - Baud Rate Generator
    225
- Operations
  226
  - Initialization
    226
  - Data Transmission in Master Mode
    227
  - Data Reception in Master Mode
    229
  - 10-Bit Addressing in Master Mode
    232
  - Data Transmission in Slave Mode
    233
  - Data Reception in Slave Mode
    235
  - Slave Operations in 10-Bit Address Mode
    237
  - Automatic Bus Clearing Operation
    237
  - Error Detection
    238
- Interrupts
  239
- DMA Transfer Requests
  240
- Control Registers
  240
16-Bit PWM Timers (T16B)

247
- Overview
  247
- Input/Output Pins
  248
- Clock Settings
  249
  - T16B Operating Clock
    249
  - Clock Supply in SLEEP Mode
    249
  - Clock Supply During Debugging
    249
  - Event Counter Clock
    249
- Operations
  250
  - Initialization
    250
  - Counter Block Operations
    251
  - Comparator/Capture Block Operations
    254
  - TOUT Output Control
    263
- Interrupt
  269
- DMA Transfer Requests
  269
- Control Registers
  269
18 IR Remote Controller (REMC3)

279
- Overview
  279
- Output Pins and External Connections
  279
  - List of Output Pins
    279
  - External Connections
    280
- Clock Settings
  280
  - REMC3 Operating Clock
    280
  - Clock Supply in SLEEP Mode
    280
  - Clock Supply During Debugging
    280
- Operations
  280
  - Initialization
    280
  - Data Transmission Procedures
    281
  - REMO Output Waveform
    281
  - Continuous Data Transmission and Compare Buffers
    283
- Interrupts
  284
- Application Example: Driving el Lamp
  285
- Control Registers
  285
12-Bit A/D Converter (ADC12A)

291
- Overview
  291
- Input Pins and External Connections
  292
  - List of Input Pins
    292
  - External Connections
    292
- Clock Settings
  292
  - ADC12A Operating Clock
    292
  - Sampling Time
    292
- Operations
  293
- Interrupts
  296
- DMA Transfer Requests
  296
- Control Registers
  297
20 F Converter (RFC)

302
- Overview
  302
- Input/Output Pins and External Connections
  303
  - List of Input/Output Pins
    303
  - External Connections
    303
- Clock Settings
  304
  - RFC Operating Clock
    304
  - Clock Supply in SLEEP Mode
    304
  - Clock Supply in DEBUG Mode
    304
- Operations
  304
  - Initialization
    304
  - Operating Modes
    305
  - RFC Counters
    305
  - Converting Operations and Control Procedure
    306
  - CR Oscillation Frequency Monitoring Function
    308
- Interrupts
  308
- Control Registers
  309
21 HW Processor (HWP) and Sound Output

313
- Overview
  313
- Output Pins and External Connections
  315
  - List of Output Pins
    315
  - External Connections
    315
- Clock Settings
  316
  - HWP Operating Clock
    316
  - Clock Supply in SLEEP Mode
    316
  - Clock Supply in DEBUG Mode
    316
- Operations
  316
  - Sound Play Function
    316
  - Memory Check Function
    325
- Interrupts
  329
- HWP Internal Registers
  330
  - Sound Play Function Registers
    330
    
    Function ID Register
    330
    
    Interrupt Mask Register
    330
    
    ROM Address Register
    331
    
    ROM Size Register
    331
    
    Key Code Register
    331
    
    N Command Register
    332
    
    N Sentence Number Setting Register
    332
    
    N Volume Control Register
    332
    
    N Repeat Control Register
    333
    
    0 Playback Speed Conversion Register
    333
    
    N State Monitor Register
    334
    
    Error Status Register
    334
    
    Operating Status Register
    334
    
    Version Number Register
    334
  - Memory Check Function Register
    335
    
    Function ID Register
    335
    
    Interrupt Mask Register
    335
    
    Memory Address Register
    335
    
    Memory Size Register
    336
    
    Initial Value Setting Register
    336
    
    Command Register
    336
    
    State Monitor Register
    336
    
    Error Status Register
    337
    
    Operating Status Register
    337
    
    Calculation Result Register
    337
    
    Version Number Register
    337
- Control Registers
  338
  - HWP Control Register
    338
  - HWP Interrupt Flag Register
    338
  - HWP Interrupt Enable Register
    338
  - HWP Command Trigger Register
    338
  - SDAC Clock Control Register
    339
  - SDAC Control Register
    339
  - SDAC Mode Register
    340
  - SDAC Data Register
    340
  - SDAC Interrupt Flag Register
    340
  - SDAC Interrupt Enable Register
    341
- Current Consumption
  343
- System Reset Controller (SRC) Characteristics
  345
- Clock Generator (CLG) Characteristics
  346
- Flash Memory Characteristics
  349
- Input/Output Port (PPORT) Characteristics
  349
- Supply Voltage Detector (SVD3) Characteristics
  350
- UART (UART3) Characteristics
  352
- Synchronous Serial Interface (SPIA) Characteristics
  352
- Quad Synchronous Serial Interface (QSPI) Characteristics
  354
- I 2 C (I2C) Characteristics
  354
- R/F Converter (RFC) Characteristics
  356
23 Basic External Connection Diagram

358
24 Package

361
Appendix A List of Peripheral Circuit Control Registers

365

Epson Buzzer S1C31D51 Application Note (27 pages)

Speech Synthesizer Sound Input/Output

Brand: Epson | Category: Synthesizer | Size: 0 MB

Epson Buzzer S1C31D51 Manual (21 pages)

CMOS 32-BIT SINGLE CHIP MICROCONTROLLER

Brand: Epson | Category: Motherboard | Size: 2 MB

Table of Contents
3
1 Overview

5
2 Name and Function of each Part

6
3 Settings

8
- Jumpers
  8
- Power Supply
  11
- Audio Amplifier
  12
- Buzzer Speech
  13
4 Usage

14
- Running Demo Software
  14
- Debugging Software
  15
Appendix A Circuit Diagrams

16
Appendix B Parts List

19
Revision History

20

Epson Buzzer S1C31D51 Manual (15 pages)

CMOS 32-BIT SINGLE CHIP MICROCONTROLLER

Brand: Epson | Category: Motherboard | Size: 1 MB

Table of Contents
3
1 Overview

5
2 Name and Function of each Part

6
3 Settings

7
4 Usage

9
- Running of the Demo Software
  9
Appendix A Circuit Diagrams

10
Appendix B Parts List

11
Appendix C Recommended Circuit for Buzzer Connection

12
- Recommended Circuit for Electromagnetic Buzzer Connection
  12
- Recommended Circuit for Piezoelectric Buzzer Connection
  13
Revision History

14

Epson Buzzer S1C31D51 Getting Started (13 pages)

Sound MCU

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Epson Buzzer S1C31D51 Technical Manual (425 pages)

Table of Contents

1 Overview

2 Power Supply, Reset, and Clocks

3 CPU and Debugger

4 Memory and Bus

5 Interrupt

6 DMA Controller (DMAC)

7 O Ports (PPORT)

8 Universal Port Multiplexer (UPMUX)

9 Watchdog Timer (WDT2)

10 Real-Time Clock (RTCA)

11 Supply Voltage Detector (SVD3)

16-Bit Timers (T16)

13 Uart (Uart3)

14 Synchronous Serial Interface (SPIA)

15 Quad Synchronous Serial Interface (QSPI)

100 C (I2C)

16-Bit PWM Timers (T16B)

18 IR Remote Controller (REMC3)

12-Bit A/D Converter (ADC12A)

20 F Converter (RFC)

21 HW Processor (HWP) and Sound Output

23 Basic External Connection Diagram

24 Package

Appendix A List of Peripheral Circuit Control Registers

Epson Buzzer S1C31D51 Application Note (27 pages)

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Epson Buzzer S1C31D51 Manual (21 pages)

Table of Contents

1 Overview

2 Name and Function of each Part

3 Settings

4 Usage

Appendix A Circuit Diagrams

Appendix B Parts List

Revision History

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1 Overview

2 Name and Function of each Part

3 Settings

4 Usage

Appendix A Circuit Diagrams

Appendix B Parts List

Appendix C Recommended Circuit for Buzzer Connection

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