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21 HW Processor (HWP) and Sound Output ................................................................21-1
21.1 Overview ...................................................................................................................... 21-1
21.2 Output Pins and External Connections ........................................................................ 21-3
21.2.1 List of Output Pins ............................................................................................... 21-3
21.2.2 External Connections .......................................................................................... 21-3
21.3 Clock Settings .............................................................................................................. 21-4
21.3.1 HWP Operating Clock ......................................................................................... 21-4
21.3.2 Clock Supply in SLEEP Mode ............................................................................. 21-4
21.3.3 Clock Supply in DEBUG Mode............................................................................ 21-4
21.4 Operations ................................................................................................................... 21-4
21.4.1 Sound Play Function ........................................................................................... 21-4
21.4.2 Memory Check Function .................................................................................... 21-13
21.5 Interrupts ..................................................................................................................... 21-17
21.6 HWP Internal Registers ............................................................................................... 21-18
21.6.1 Sound Play Function Registers .......................................................................... 21-18
Function ID Register ............................................................................................................ 21-18
Interrupt Mask Register ....................................................................................................... 21-18
ROM Address Register ........................................................................................................ 21-19
ROM Size Register .............................................................................................................. 21-19
Key Code Register............................................................................................................... 21-19
Ch.n Command Register ..................................................................................................... 21-20
Ch.n Sentence Number Setting Register ............................................................................ 21-20
Ch.n Volume Control Register ............................................................................................. 21-20
Ch.n Repeat Control Register ............................................................................................. 21-21
Ch.0 Playback Speed Conversion Register ........................................................................ 21-21
Ch.n State Monitor Register ................................................................................................ 21-22
Error Status Register ........................................................................................................... 21-22
Operating Status Register ................................................................................................... 21-22
Version Number Register ..................................................................................................... 21-22
21.6.2 Memory Check Function Register ...................................................................... 21-23
Function ID Register ............................................................................................................ 21-23
Interrupt Mask Register ....................................................................................................... 21-23
Memory Address Register ................................................................................................... 21-23
Memory Size Register ......................................................................................................... 21-24
Initial Value Setting Register ................................................................................................ 21-24
Command Register ............................................................................................................. 21-24
State Monitor Register......................................................................................................... 21-24
Error Status Register ........................................................................................................... 21-25
Operating Status Register ................................................................................................... 21-25
Calculation Result Register ................................................................................................. 21-25
Version Number Register ..................................................................................................... 21-25
21.7 Control Registers ........................................................................................................ 21-26
HWP Control Register ......................................................................................................... 21-26
HWP Interrupt Flag Register ................................................................................................ 21-26
HWP Interrupt Enable Register ........................................................................................... 21-26
HWP Command Trigger Register ........................................................................................ 21-26
SDAC Clock Control Register.............................................................................................. 21-27
SDAC Control Register ........................................................................................................ 21-27
SDAC Mode Register .......................................................................................................... 21-28
SDAC Data Register ............................................................................................................ 21-28
SDAC Interrupt Flag Register .............................................................................................. 21-28
SDAC Interrupt Enable Register .......................................................................................... 21-29
22 Electrical Characteristics .........................................................................................22-1
22.1 Absolute Maximum Ratings ......................................................................................... 22-1
22.2 Recommended Operating Conditions ......................................................................... 22-1
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Seiko Epson Corporation
CONTENTS
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