Epson S1C31D50 Technical Manual page 188

Cmos 32-bit single chip

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(memory mapped

access mode)

Figure 15.2.2.1 Connections between QSPI in Memory Mapped Access Mode

(register access

master mode)

Figure 15.2.2.2 Connections between QSPI in Register Access Master Mode

(register access

master mode)

Figure 15.2.2.3 Connections between QSPI in Register Access Master Mode

S1C31D50/D51 TECHNICAL MANUAL

and an External QSPI Slave Device

and External Single-I/O SPI (Legacy SPI) Slave Devices

and External Dual-I/O SPI Slave Devices

Seiko Epson Corporation

15 Quad Synchronous Serial Interface (QSPI)

External QSPI

slave device

External single-I/O

SPI slave devices

External dual-I/O

SPI slave devices