Operations Of Clock Output/Buzzer Output Controller; Operation As Clock Output; Operation As Buzzer Output - NEC 78K0 Series User Manual

(2) Port mode register 14 (PM14)
This register sets port 14 input/output in 1-bit units.
When using the P140/INTP6/PCL pin for clock output and the P141/INTP7/BUZ pin for buzzer output, clear
PM140 and PM141 and the output latches of P140 and P141 to 0.
PM14 is set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PM14 to FFH.
Address: FF2EH
Symbol
PM14

12.4 Operations of Clock Output/Buzzer Output Controller

12.4.1 Operation as clock output

The clock pulse is output as the following procedure.
<1> Select the clock pulse output frequency with bits 0 to 3 (CCS0 to CCS3) of the clock output selection register
(CKS) (clock pulse output in disabled status).
<2> Set bit 4 (CLOE) of CKS to 1 to enable clock output.
Remark The clock output controller is designed not to output pulses with a small width during output
enable/disable switching of the clock output. As shown in Figure 12-4, be sure to start output from the
low period of the clock (marked with * in the figure). When stopping output, do so after the high-level
period of the clock.
CLOE
Clock output

12.4.2 Operation as buzzer output

The buzzer frequency is output as the following procedure.
<1> Select the buzzer output frequency with bits 5 and 6 (BCS0, BCS1) of the clock output selection register
(CKS) (buzzer output in disabled status).
<2> Set bit 7 (BZOE) of CKS to 1 to enable buzzer output.
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
Figure 12-3. Format of Port Mode Register 14 (PM14)
After reset: FFH R/W
7 6 5
1 1 1
PM14n P14n pin I/O mode selection (n = 0, 1)
0 Output mode (output buffer on)
1 Input mode (output buffer off)
Figure 12-4. Remote Control Output Application Example
*
Preliminary User's Manual U17260EJ3V1UD
4 3 2
1 1 1 PM141
*
1 0
PM140
303