NEC 78K0 Series User Manual page 28

Part Number
Item
Flash memory (KB)
RAM (KB)
Bank (flash memory)
Power supply voltage
Regulator
Minimum instruction
execution time
High-speed system
Internal high-speed
oscillation
Subsystem
Internal low-speed
oscillation
Total
N-ch O.D. (6 V
tolerance)
16 bits (TM0)
8 bits (TM5)
8 bits (TMH)
Watch
WDT
3-wire CSI
Automatic transmit/
receive 3-wire CSI
Note
UART/3-wire CSI
UART supporting LIN-
bus
2
I C bus
10-bit A/D
External
Internal
Key interrupt
RESET pin
POC
LVI
WDT
Clock output/buzzer output
Multiplier/divider
On-chip debug function
Operating ambient
temperature
Note Select either of the functions of these alternate-function pins.
28
CHAPTER 1 OUTLINE
78K0/KD2
52 Pins
16 24 32 48 60 96
0.75 1 1 2 3 5
−
4
µ
0.1 s (20 MHz: V
20 MHz: V = 4.0 to 5.5 V/10 MHz: V
DD
45
4
1 ch
−
8
16
1.59 V ±0.15 V (rise time to 1.8 V: 3.6 ms (MAX.))
The detection level of the supply voltage is selectable in 16 steps.
Clock output only
−
Provided
µ
PD78F0527D only
−40 to +85°C ((T), (R), (S) products), −40 to +125°C ((T2) product)
Preliminary User's Manual U17260EJ3V1UD
78K0/KE2
64 Pins
128 16 24 32 48
7 0.75 1 1 2
−
6
V = 1.8 to 5.5 V
DD
Provided
µ
= 4.0 to 5.5 V)/0.2 s (10 MHz: V
DD
µ
0.4 s (5 MHz: V = 1.8 to 5.5 V)
DD
= 2.7 to 5.5 V/5 MHz: V
DD
8 MHz (TYP.): V = 1.8 to 5.5 V
DD
32.768 kHz (TYP.): V = 1.8 to 5.5 V
DD
240 kHz (TYP.): V = 1.8 to 5.5 V
DD
55
4
2 ch
2 ch
1 ch
1 ch
−
1 ch
1 ch
1 ch
8 ch
8 ch
Provided
Provided
−
µ
PD78F0537D only
78K0/KF2
80 Pins
60 96 128 48 60 96
3 5 7 2 3 5
−
4 6 4
= 2.7 to 5.5 V)/
DD
= 1.8 to 5.5 V
DD
71
4
2 ch
1 ch
1 ch
9
19 20
Provided
Provided
µ
PD78F0547D only
(2/2)
128
7
6