NEC 78K0 Series User Manual page 496

(3) Priority specification flag registers (PR0L, PR0H, PR1L, PR1H)
The priority specification flag registers are used to set the corresponding maskable interrupt priority order.
PR0L, PR0H, PR1L, and PR1H are set by a 1-bit or 8-bit memory manipulation instruction. If PR0L and PR0H,
and PR1L and PR1H are combined to form 16-bit registers PR0 and PR1, they are set by a 16-bit memory
manipulation instruction.
Reset signal generation sets these registers to FFH.
Figure 19-4. Format of Priority Specification Flag Registers (PR0L, PR0H, PR1L, PR1H)
Address: FFE8H After reset: FFH
Symbol <7>
PR0L SREPR6
Address: FFE9H After reset: FFH
Symbol <7>
PR0H TMPR010
Address: FFEAH After reset: FFH
Symbol <7>
PR1L PPR7
Address: FFEBH After reset: FFH
Symbol 7
PR1H 1
XXPRX
0
1
µ
Note PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D only.
Caution Be sure to set bits 1 to 7 of PR1H to 1 for the
bits 4 to 7 of PR1H to 1 for the
496
CHAPTER 19 INTERRUPT FUNCTIONS
R/W
<6> <5>
PPR5 PPR4 PPR3
R/W
<6> <5>
TMPR000 TMPR50 TMPRH0
R/W
<6> <5>
PPR6 WTPR KRPR
R/W
6 5
1 1
High priority level
Low priority level
µ
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D.
Preliminary User's Manual U17260EJ3V1UD
<4> <3> <2>
PPR2 PPR1
<4> <3> <2>
TMPRH1 DUALPR0
CSIPR10
STPR0
<4> <3> <2>
TMPR51 WTIPR
4 <3> <2>
Note
1 TMPR011 TMPR001
Priority level selection
µ
PD78F0531, 78F0532, and 78F0533. Be sure to set
<1> <0>
PPR0 LVIPR
<1> <0>
STPR6 SRPR6
<1> <0>
SRPR0 ADPR
<1> <0>
Note Note
CSIPR11 IICPR0
Note
DMUPR