NEC 78K0 Series User Manual page 525

Item
System clock
Main system clock f
RH
f
X
f
EXCLK
Subsystem clock f
XT
f
EXCLKS
f
RL
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event
00
counter
Note
01
8-bit timer/event 50
counter
51
8-bit timer H0
H1
Watch timer
Watchdog timer
Clock output
Buzzer output
A/D converter
Serial interface UART0
UART6
CSI10
Note
CSI11
IIC0
Note
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
µ
Note PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D only.
Remark f : Internal high-speed oscillation clock
RH
f : X1 oscillation clock
X
f : External main system clock
EXCLK
f : XT1 oscillation clock
XT
f : External subsystem clock
EXCLKS
f : Internal low-speed oscillation clock
RL
CHAPTER 22 RESET FUNCTION
Table 22-1. Operation Statuses During Reset Period
Clock supply to the CPU is stopped.
Operation stopped
Operation stopped (pin is I/O port mode)
Clock input invalid (pin is I/O port mode)
Operation stopped (pin is I/O port mode)
Clock input invalid (pin is I/O port mode)
Operation stopped
Operation stopped
Operable
Operation stopped
Preliminary User's Manual U17260EJ3V1UD
During Reset Period
525