Register For Confirming Reset Source - NEC 78K0 Series User Manual

22.1 Register for Confirming Reset Source

Many internal reset generation sources exist in the 78K0/KE2. The reset control flag register (RESF) is used to
store which source has generated the reset request.
RESF can be read by an 8-bit memory manipulation instruction.
RESET input, reset by power-on-clear (POC) circuit, and reading RESF set RESF to 00H.
Address: FFACH After reset: 00H
Symbol 7
RESF 0
WDTRF
0
1
LVIRF
0
1
Note The value after reset varies depending on the reset source.
Caution Do not read data by a 1-bit memory manipulation instruction.
The status of RESF when a reset request is generated is shown in Table 22-3.
Reset Source
Flag
WDTRF
LVIRF
CHAPTER 22 RESET FUNCTION
Figure 22-5. Format of Reset Control Flag Register (RESF)
Note
R
6 5
0 0
Internal reset request by watchdog timer (WDT)
Internal reset request is not generated, or RESF is cleared.
Internal reset request is generated.
Internal reset request by low-voltage detector (LVI)
Internal reset request is not generated, or RESF is cleared.
Internal reset request is generated.
Table 22-3. RESF Status When Reset Request Is Generated
RESET Input
Cleared (0)
Preliminary User's Manual U17260EJ3V1UD
4 3
WDTRF 0
Reset by POC Reset by WDT
Cleared (0) Set (1)
Held
2 1 0
0 0 LVIRF
Reset by LVI
Held
Set (1)
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