P20 To P27 (Port 2); P30 To P33 (Port 3) - NEC 78K0 Series User Manual

2.2.3 P20 to P27 (port 2)

P20 to P27 function as an 8-bit I/O port. These pins also function as pins for A/D converter analog input.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P20 to P27 function as an 8-bit I/O port. P20 to P27 can be set to input or output port in 1-bit units using port
mode register 2 (PM2).
(2) Control mode
P20 to P27 function as A/D converter analog input pins (ANI0 to ANI7). When using these pins as analog input
pins, see (5) ANI0/P20 to ANI7/P27 in 13.6 Cautions for A/D Converter.
Caution ANI0/P20 to ANI7/P27 are set in the analog input mode after release of reset.

2.2.4 P30 to P33 (port 3)

P30 to P33 function as a 4-bit I/O port. These pins also function as pins for external interrupt request input and
timer I/O.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P30 to P33 function as a 4-bit I/O port. P30 to P33 can be set to input or output port in 1-bit units using port
mode register 3 (PM3). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 3
(PU3).
(2) Control mode
P30 to P33 function as external interrupt request input and timer I/O.
(a) INTP1 to INTP4
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
(b) TI51
This is an external count clock input pin to 8-bit timer/event counter 51.
(c) TO51
This is a timer output pin from 8-bit timer/event counter 51.
Caution In the
malfunction.
Remark Only for the
(OCD1A, OCD1B) when the on-chip debug function is used. For how to connect an in-circuit
emulator supporting on-chip debugging (QB-78K0MINI), see CHAPTER 27 ON-CHIP DEBUG
FUNCTION (
38
CHAPTER 2 PIN FUNCTIONS
µ
PD78F0537D, be sure to pull the P31 pin down before a reset release to prevent
µ
PD78F0537D, P31 and P32 can be used as on-chip debug mode setting pins
µ
PD78F0537D ONLY).
Preliminary User's Manual U17260EJ3V1UD