Wakeup Function - NEC 78K0 Series User Manual

8-bit single-chip microcontrollers
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Table 17-5. Status During Arbitration and Interrupt Request Generation Timing
Status During Arbitration
During address transmission
Read/write data after address transmission
During extension code transmission
Read/write data after extension code transmission
During data transmission
During ACK transfer period after data transmission
When restart condition is detected during data transfer
When stop condition is detected during data transfer
When data is at low level while attempting to generate a restart
condition
When stop condition is detected while attempting to generate a
restart condition
When data is at low level while attempting to generate a stop
condition
When SCL0 is at low level while attempting to generate a
restart condition
Notes 1. When WTIM0 (bit 3 of IIC control register 0 (IICC0)) = 1, an interrupt request occurs at the falling edge
of the ninth clock. When WTIM0 = 0 and the extension code's slave address is received, an interrupt
request occurs at the falling edge of the eighth clock.
2. When there is a chance that arbitration will occur, set SPIE0 = 1 for master device operation.
Remark
SPIE0: Bit 4 of IIC control register 0 (IICC0)

17.5.13 Wakeup function

2
The I
C bus slave function is a function that generates an interrupt request signal (INTIIC0) when a local address
and extension code have been received.
This function makes processing more efficient by preventing unnecessary INTIIC0 signal from occurring when
addresses do not match.
When a start condition is detected, wakeup standby mode is set. This wakeup standby mode is in effect while
addresses are transmitted due to the possibility that an arbitration loss may change the master device (which has
generated a start condition) to a slave device.
However, when a stop condition is detected, bit 4 (SPIE0) of IIC control register 0 (IICC0) is set regardless of the
wakeup function, and this determines whether interrupt requests are enabled or disabled.
436
CHAPTER 17 SERIAL INTERFACE IIC0
At falling edge of eighth or ninth clock following byte transfer
When stop condition is generated (when SPIE0 = 1)
At falling edge of eighth or ninth clock following byte transfer
When stop condition is generated (when SPIE0 = 1)
At falling edge of eighth or ninth clock following byte transfer
Preliminary User's Manual U17260EJ3V1UD
Interrupt Request Generation Timing
Note 1
Note 2
Note 1
Note 2
Note 1

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