Square Wave Output Operation - NEC 78K0 Series User Manual

7.4.2 Square wave output operation

When 16-bit timer/event counter 0n operates as an interval timer (see 7.4.1), a square wave can be output from the
TO0n pin by setting the 16-bit timer output control register 0n (TOC0n) to 03H.
When TMC0n3 and TMC0n2 are set to 11 (count clear & start mode entered upon a match between TM0n and
CR00n), the counting operation is started in synchronization with the count clock.
When the value of TM0n later matches the value of CR00n, TM0n is cleared to 0000H, an interrupt signal
(INTTM00n) is generated, and output of the TO0n pin is inverted. This TO0n pin output that is inverted at fixed
intervals enables TO0n to output a square wave.
Remarks 1. For the setting of I/O pins, see 7.3 (5) Port mode register 0 (PM0).
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 19 INTERRUPT FUNCTIONS.
Figure 7-20. Block Diagram of Square Wave Output Operation
Count clock
Operable bits
TMC0n3, TMC0n2
µ
Remark n = 0: PD78F0531, 78F0532, 78F0533
µ
n = 0, 1: PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Figure 7-21. Basic Timing Example of Square Wave Output Operation
TM0n register
0000H
Operable bits
(TMC0n3, TMC0n2)
Compare register
(CR00n)
TO0n pin output
Compare match interrupt
(INTTM00n)
µ
Remark n = 0: PD78F0531, 78F0532, 78F0533
µ
n = 0, 1: PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Clear
16-bit counter (TM0n)
CR00n register
N
00
Interval
(N + 1)
Preliminary User's Manual U17260EJ3V1UD
Output
controller
Match signal
INTTM00n signal
N N
11
N
Interval Interval
(N + 1) (N + 1)
TO0n pin
N
Interval
(N + 1)
191