NEC 78K0 Series User Manual page 154

<4> Waiting for the stabilization of the oscillation of X1 clock
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation
clock.
Cautions 1. Do not change the value of EXCLK and OSCSEL while the X1 clock is operating.
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to
be used (see CHAPTER 29 ELECTRICAL SPECIFICATIONS (TARGET)).
(2) Example of setting procedure when using the external main system clock
<1> Setting frequency (OSCCTL register)
Using AMPH, set the frequency to be used.
Note
AMPH
1 MHz ≤ f
0
1 10 MHz < f
Note Set AMPH before setting the peripheral functions after a reset release. The value of AMPH can
be changed only once after a reset release. When AMPH is set to 1, the clock supply to the CPU
is stopped for 5
Remark f : High-speed system clock oscillation frequency
XH
<2> Setting P121/X1 and P122/X2/EXCLK pins and selecting operation mode (OSCCTL register)
When EXCLK and OSCSEL are set to 1, the mode is switched from port mode to external clock input
mode.
EXCLK OSCSEL
1
<3> Controlling external main system clock input (MOC register)
When MSTOP is cleared to 0, the input of the external main system clock is enabled.
Cautions 1. Do not change the value of EXCLK and OSCSEL while the external main system clock is
operating.
2. Set the external main system clock after the supply voltage has reached the operable
voltage of the clock to be used (see CHAPTER 29
(TARGET)).
(3) Example of setting procedure when using high-speed system clock as CPU clock and peripheral
hardware clock
<1> Setting high-speed system clock oscillation
(See 6.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of
setting procedure when using the external main system clock.)
Note The setting of <1> is not necessary when high-speed system clock is already operating.
154
CHAPTER 6 CLOCK GENERATOR
Operating Frequency Control
≤ 10 MHz
XH
≤ 20 MHz
XH
µ
s (MIN.).
Operation Mode of High-
Speed System Clock Pin
1 External clock input mode
Note
Preliminary User's Manual U17260EJ3V1UD
P121/X1 Pin P122/X2/EXCLK Pin
I/O port External clock input
ELECTRICAL SPECIFICATIONS