Operation Of Low-Voltage Detector - NEC 78K0 Series User Manual

(3) Port mode register 12 (PM12)
When using the P120/EXLVI/INTP0 pin for external low-voltage detection potential input, set PM120 to 1. At this
time, the output latch of P120 may be 0 or 1.
PM12 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PM12 to FFH.
Address: FF2CH After reset: FFH
7
Symbol
1
PM12
PM12n
0
1

24.4 Operation of Low-Voltage Detector

The low-voltage detector can be used in the following two modes.
(1) Used as reset
• If LVISEL = 0, compares the supply voltage (V
signal when V < V
DD
• If LVISEL = 1, compares the input voltage from external input pin (EXLVI) and detection voltage (V
V (TYP.)), generates an internal reset signal when EXLVI < V
V .
EXLVI
(2) Used as interrupt
• If LVISEL = 0, compares the supply voltage (V
signal (INTLVI) when V
• If LVISEL = 1, compares the input voltage from external input pin (EXLVI) and detection voltage (V
V (TYP.)), and generates an interrupt signal (INTLVI) when EXLVI < V
Remark LVISEL: Bit 2 of low-voltage detection register (LVIM)
540
CHAPTER 24 LOW-VOLTAGE DETECTOR
Figure 24-4. Format of Port Mode Register 12 (PM12)
R/W
6 5
1 1
P12n pin I/O mode selection (n = 0 to 4)
Output mode (output buffer on)
Input mode (output buffer off)
, and releases internal reset when V
LVI
< V .
DD LVI
Preliminary User's Manual U17260EJ3V1UD
4 3 2
PM124 PM123 PM122
) and detection voltage (V
DD
≥ V
.
DD LVI
, and releases internal reset when EXLVI ≥
EXLVI
) and detection voltage (V
DD
.
EXLVI
1 0
PM121 PM120
), generates an internal reset
LVI
= 1.21
EXLVI
), and generates an interrupt
LVI
= 1.21
EXLVI