NEC 78K0 Series User Manual page 54

8-bit single-chip microcontrollers
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F F F F H
Special function registers
F F 0 0 H
F E F F H
F E E 0 H
F E D F H
F B 0 0 H
F A F F H
Data memory
space
F 8 0 0 H
F 7 F F H
Program RAM area
RAM spcae in
which instruction
can be fetched
E 0 0 0 H
D F F F H
C 0 0 0 H
B F F F H
Bank
area
Program
8 0 0 0 H
memory
7 F F F H
space
Common
area
0 0 0 0 H
Notes 1. When boot swap is not used: Set the option bytes to 0080H to 0084H.
When boot swap is used:
2. Writing boot cluster 0 can be prohibited depending on the setting of security (see 26.8 Security
Setting).
54
CHAPTER 3 CPU ARCHITECTURE
Figure 3-7. Memory Map (
(SFR)
256 x 8 bits
General-purpose
registers
32 x 8 bits
Internal high-speed RAM
1024 x 8 bits
Reserved
(Memory bank 2)
Internal expansion RAM
6144 x 8 bits
Reserved
Flash memory
16384 x 8 bits
(memory bank 0)
Flash memory
32768 x 8 bits
(Memory bank 1)
Set the option bytes to 0080H to 0084H and 1080H to 1084H.
Preliminary User's Manual U17260EJ3V1UD
µ
PD78F0537)
7 F F F H
1 0 8 5 H
1 0 8 4 H
Option byte area
1 0 8 0 H
1 0 7 F H
(Memory bank 4)
1 0 0 0 H
0 F F F H
CALLF entry area
0 8 0 0 H
0 7 F F H
0 0 8 5 H
0 0 8 4 H
Option byte area
0 0 8 0 H
0 0 7 F H
CALLT table area
(Memory bank 5)
0 0 4 0 H
(Memory bank 3)
0 0 3 F H
Vector table area
0 0 0 0 H
Program area
1 F F F H
Note1
5 x 8 bits
Boot cluster 1
Program area
2048 x 8 bits
Program area
1915 x 8 bits
Note1
Boot cluster 0
5 x 8 bits
64 x 8 bits
64 x 8 bits
Note2

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