NEC 78K0 Series User Manual page 539

(2) Low-voltage detection level selection register (LVIS)
This register selects the low-voltage detection level.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation input sets LVIS to 00H.
Figure 24-3. Format of Low-Voltage Detection Level Selection Register (LVIS)
Address: FFBFH After reset: 00H
7
Symbol
0
LVIS
LVIS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Cautions 1. Be sure to clear bits 4 to 7 to 0.
2. Do not change the value of LVIS during LVI operation.
3. When an input voltage from the external input pin (EXLVI) is detected, the detection
voltage (V
CHAPTER 24 LOW-VOLTAGE DETECTOR
R/W
6 5 4
0 0 0
LVIS2 LVIS1 LVIS0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
= 1.21 V (TYP.)) is fixed. Therefore, setting of LVIS is not necessary.
EXLVI
Preliminary User's Manual U17260EJ3V1UD
3 2
LVIS3 LVIS2 LVIS1
Detection level
(4.24 V ±0.1 V)
V
LVI0
(4.09 V ±0.1 V)
V
LVI1
(3.93 V ±0.1 V)
V
LVI2
(3.78 V ±0.1 V)
V
LVI3
(3.62 V ±0.1 V)
V
LVI4
(3.47 V ±0.1 V)
V
LVI5
(3.32 V ±0.1 V)
V
LVI6
(3.16 V ±0.1 V)
V
LVI7
(3.01 V ±0.1 V)
V
LVI8
(2.85 V ±0.1 V)
V
LVI9
(2.70 V ±0.1 V)
V
LVI10
(2.55 V ±0.1 V)
V
LVI11
(2.39 V ±0.1 V)
V
LVI12
(2.24 V ±0.1 V)
V
LVI13
(2.08 V ±0.1 V)
V
LVI14
(1.93 V ±0.1 V)
V
LVI15
1 0
LVIS0
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