NEC 78K0 Series User Manual page 526

Table 22-2. Hardware Statuses After Reset Acknowledgment (1/3)
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM Data memory
General-purpose registers
Port registers (P0 to P7, P12 to P14) (output latches)
Port mode registers (PM0 to PM7, PM12, PM14)
Pull-up resistor option registers (PU0, PU1, PU3 to PU5, PU7, PU12, PU14)
Internal expansion RAM size switching register (IXS)
Internal memory size switching register (IMS)
Memory bank select register (BANK)
Clock operation mode select register (OSCCTL)
Processor clock control register (PCC)
Internal oscillation mode register (RCM)
Main OSC control register (MOC)
Main clock mode register (MCM)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
16-bit timer/event Timer counters 00, 01 (TM00, TM01)
Note 4
counters 00, 0
Capture/compare registers 000, 010, 001, 011 (CR000, CR010, CR001, CR011)
Mode control registers 00, 01 (TMC00, TMC01)
Prescaler mode registers 00, 01 (PRM00, PRM01)
Capture/compare control registers 00, 01 (CRC00, CRC01)
Timer output control registers 00, 01 (TOC00, TOC01)
Notes 1. During reset signal generation or oscillation stabilization time wait, only the PC contents among the
hardware statuses become undefined. All other hardware statuses remain unchangeh
526
CHAPTER 22 RESET FUNCTION
Hardware
Preliminary User's Manual U17260EJ3V1UD
After Reset
Note 1
Acknowledgment
The contents of the
reset vector table
(0000H, 0001H) are
set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H
FFH
00H
Note 3
0CH
Note 3
CFH
00H
00H
01H
80H
80H
00H
00H
05H
0000H
0000H
00H
00H
00H
00H