WR
PU
RD
WR
PORT
WR
PM
P0:
Port register 0
PU0:
Pull-up resistor option register 0
PM0:
Port mode register 0
RD:
Read signal
WR××: Write signal
Note Available only in the
104
CHAPTER 5 PORT FUNCTIONS
Figure 5-4. Block Diagram of P02
PU0
PU02
P0
Output latch
(P02)
PM0
PM02
Alternate
Note
function
µ
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D.
Preliminary User's Manual U17260EJ3V1UD
EV
DD
P-ch
Note
P02/SO11