NEC 78K0 Series User Manual page 152

Remark While the microcontroller is operating, a clock that is not used as the CPU clock can be stopped via
software settings.
stopped by executing the STOP instruction (see (4) in 6.6.1 Example of controlling high-speed
system clock, (3) in 6.6.2 Example of controlling internal high-speed oscillation clock, and (4) in
6.6.3 Example of controlling subsystem clock).
Figure 6-13. Clock Generator Operation When Power Supply Voltage Is Turned On
(When 2.7 V/1.59 V POC Mode Is Set (Option Byte: POCMODE = 1))
Power supply
voltage (V )
DD
0 V
Internal reset signal
<1>
CPU clock
Internal high-speed
oscillation clock (f )
RH
High-speed
system clock (f )
XH
(when X1 oscillation
selected)
Subsystem clock (f )
SUB
(when XT1 oscillation
selected)
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
<2> When the power supply voltage exceeds 2.7 V (TYP.), the reset is released and the internal high-speed
oscillator automatically starts oscillation.
<3> After the reset is released and reset processing is performed, the CPU starts operation on the internal high-
speed oscillation clock.
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 6.6.1 Example of controlling high-
speed system clock and (1) in 6.6.3 Example of controlling subsystem clock).
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
switching via software (see (3) in 6.6.1 Example of controlling high-speed system clock and (3) in 6.6.3
Example of controlling subsystem clock).
Note When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the internal
high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the oscillation
stabilization time counter status register (OSTC). If the CPU operates on the high-speed system clock (X1
oscillation), set the oscillation stabilization time when releasing STOP mode using the oscillation
stabilization time select register (OSTS).
Caution It is not necessary to wait for the oscillation stabilization time when an external clock input from
the EXCLK and EXCLKS pins is used.
152
CHAPTER 6 CLOCK GENERATOR
The internal high-speed oscillation clock and high-speed system clock can be
2.7 V (TYP.)
Reset processing
<3>
µ
(20 s (TYP.))
Internal high-speed
oscillation clock
<2>
Waiting for oscillation
<4>
accuracy stabilization
oscillation stabilization time:
2
Starting X1 oscillation <4>
is specified by software.
Starting XT1 oscillation
is specified by software.
Preliminary User's Manual U17260EJ3V1UD
Switched by
software
<5>
High-speed system clock
X1 clock
11 16 Note
/f to 2 /f
X X
<5>
Subsystem clock