NEC 78K0 Series User Manual page 180

Figure 7-9. Example of CR01n Capture Operation (When Rising Edge Is Specified)
Count clock
Rising edge detection
µ
Remark n = 0: PD78F0531, 78F0532, 78F0533
µ
n = 0, 1: PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Figure 7-10. Format of Capture/Compare Control Register 01 (CRC01)
Address: FFB8H After reset: 00H
Symbol 7
CRC01 0
CRC012
0
1
CRC011
0
1
The valid edge of the TI011 and TI001 pin is set by PRM01.
If ES011 and ES010 are set to 11 (both edges) when CRC011 is 1, the valid edge of the TI001 pin cannot
be detected.
CRC010
0
1
If TMC013 and TMC012 are set to 11 (clear & start mode entered upon a match between TM01 and
CR001), be sure to set CRC010 to 0.
Note When the valid edge is detected from the TI011 pin, the capture operation is not performed but the
INTTM001 signal is generated as an external interrupt signal.
Caution To ensure that the capture operation is performed properly, the capture trigger requires a pulse
two cycles longer than the count clock selected by prescaler mode register 01 (PRM01) (see
Figure 7-9 Example of CR01n Capture Operation (When Rising Edge Is Specified).
180
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
N − 3
TM0n
TI00n
CR01n
INTTM01n
R/W
6 5
0 0
Operates as compare register
Operates as capture register
Captures on valid edge of TI011 pin
Captures on valid edge of TI001 pin by reverse phase
Operates as compare register
Operates as capture register
Preliminary User's Manual U17260EJ3V1UD
Valid edge
N − 2 N − 1
4 3 2
0 0 CRC012
CR011 operating mode selection
CR001 capture trigger selection
Note
CR001 operating mode selection
N N + 1
N
1 0
CRC011 CRC010