Example Of Controlling Subsystem Clock - NEC 78K0 Series User Manual

(b) To stop internal high-speed oscillation clock by setting RSTOP to 1
<1> Confirming the CPU clock status (PCC and MCM registers)
Confirm with CLS and MCS that the CPU is operating on a clock other than the internal high-speed
oscillation clock.
When CLS = 0 and MCS = 0, the internal high-speed oscillation clock is supplied to the CPU, so
change the CPU clock to the high-speed system clock or subsystem clock.
CLS MCS
0
0
1
<2> Stopping the internal high-speed oscillation clock (RCM register)
When RSTOP is set to 1, internal high-speed oscillation clock is stopped.
Caution Be sure to confirm that MCS = 1 or CLS = 1 when setting RSTOP to 1. In addition, stop
peripheral hardware that is operating on the internal high-speed oscillation clock.

6.6.3 Example of controlling subsystem clock

The following two types of subsystem clocks are available.
• XT1 clock:
• External subsystem clock: External clock is input to the EXCLKS pin.
When the subsystem clock is not used, the XT1/P123 and XT2/EXCLKS/P124 pins can be used as I/O port pins.
Caution The XT1/P123 and XT2/EXCLKS/P124 pins are in the I/O port mode after a reset release.
The following describes examples of setting procedures for the following cases.
(1) When oscillating XT1 clock
(2) When using external subsystem clock
(3) When using subsystem clock as CPU clock
(4) When stopping subsystem clock
(1) Example of setting procedure when oscillating the XT1 clock
<1> Setting XT1 and XT2 pins and selecting operation mode (PCC and OSCCTL registers)
When XTSTART, EXCLKS, and OSCSELS are set as any of the following, the mode is switched from
port mode to XT1 oscillation mode.
XTSTART EXCLKS
0
1
×: don't care
Remark
<2> Waiting for the stabilization of the subsystem clock oscillation
Wait for the oscillation stabilization time of the subsystem clock by software, using a timer function.
Caution Do not change the value of XTSTART, EXCLKS, and OSCSELS while the subsystem clock is
operating.
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CHAPTER 6 CLOCK GENERATOR
0 Internal high-speed oscillation clock
1 High-speed system clock
× Subsystem clock
Crystal/ceramic resonator is connected across the XT1 and XT2 pins.
Operation Mode of
OSCSELS
Subsystem Clock Pin
0 1 XT1 oscillation mode
× ×
Preliminary User's Manual U17260EJ3V1UD
CPU Clock Status
P123/XT1 Pin
Crystal/ceramic resonator connection
P124/XT2/
EXCLKS Pin