NEC 78K0 Series User Manual page 240

(2) Setting LVS0n and LVR0n
Set LVS0n and LVR0n using the following procedure.
Figure 7-58. Example of Flow for Setting LVS0n and LVR0n Bits
Setting TOC0n.OSPE0n, TOC0n4, TOC0n1
Setting
Setting
Caution Be sure to set LVS0n and LVR0n following steps <1>, <2>, and <3> above.
Step <2> can be performed after <1> and before <3>.
<1> The TO0n pin output goes high when LVS0n and LVR0n = 10.
<2> The TO0n pin output goes low when LVS0n and LVR0n = 01 (the pin output remains unchanged from the
high level even if LVS0n and LVR0n are cleared to 00).
<3> The timer starts operating when TMC0n3 and TMC0n2 are set to 01, 10, or 11. Because LVS0n and
LVR0n were set to 10 before the operation was started, the TO0n pin output starts from the high level.
After the timer starts operating, setting LVS0n and LVR0n is prohibited until TMC0n3 and TMC0n2 = 00
(disabling the timer operation).
<4> The output level of the TO0n pin is inverted each time an interrupt signal (INTTM00n) is generated.
µ
Remark n = 0: PD78F0531, 78F0532, 78F0533
µ
n = 0, 1: PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
240
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Setting TOC0n.TOE0n bit
TOC0n.LVS0n, LVR0n bits
TMC0n.TMC0n3, TMC0n2 bits
Figure 7-59. Timing Example of LVR0n and LVS0n
TOC0n.LVS0n bit
TOC0n.LVR0n bit
Operable bits
00
(TMC0n3, TMC0n2)
TO0n pin output
INTTM00n signal
Preliminary User's Manual U17260EJ3V1UD
bits
<1> Setting of timer output operation
<2> Setting of timer output F/F
<3> Enabling timer operation
01, 10, or 11
<1> <2> <1> <3> <4> <4> <4>