NEC 78K0 Series User Manual page 392

(3) Port mode registers 0 and 1 (PM0, PM1)
These registers set port 0 and 1 input/output in 1-bit units.
When using P10/SCK10 and P04/SCK11
to 0, and set the output latches of P10 and P04 to 1.
When using P12/SO10 and P02/SO11
the output latches of P12 and P02 to 0.
When using P10/SCK10 and P04/SCK11
Note
P03/SI11 as the data input pins, and P05/SSI11
PM03, and PM05 to 1. At this time, the output latches of P10, P04, P11, P03, and P05 may be 0 or 1.
PM0 and PM1 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Note Available only in the
392
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
Note
as the clock output pins of the serial interface, clear PM10 and PM04
Note
as the data output pins of the serial interface, clear PM12, PM02, and
Note
as the clock input pins of the serial interface, P11/SI10/R
Note
µ
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Figure 16-7. Format of Port Mode Register 0 (PM0)
Address: FF20H After reset: FFH
Symbol 7 6 5
PM0 1 PM06 PM05
PM0n P0n pin I/O mode selection (n = 0 to 6)
0 Output mode (output buffer on)
1 Input mode (output buffer off)
Figure 16-8. Format of Port Mode Register 1 (PM1)
Address: FF21H After reset: FFH
Symbol 7 6 5
PM1 PM17 PM16 PM15
PM1n P1n pin I/O mode selection (n = 0 to 7)
0 Output mode (output buffer on)
1 Input mode (output buffer off)
Preliminary User's Manual U17260EJ3V1UD
/TI001 as the chip select input pin, set PM10, PM04, PM11,
R/W
4 3 2 1
PM04 PM03 PM02 PM01 PM00
R/W
4 3 2 1
PM14 PM13 PM12 PM11 PM10
D0 and
X
0
0