NEC 78K0 Series User Manual page 129

(4) A/D port configuration register (ADPC)
This register switches the P20/ANI0 to P27/ANI7 pins to digital I/O of port or analog input of A/D converter.
ADPC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Figure 5-29. Format of A/D Port Configuration Register (ADPC)
Address: FF2FH
Symbol 7
ADPC 0
ADPC3
0
0
0
0
0
0
0
0
1
Cautions 1. Set the channel used for A/D conversion to the input mode by using port mode register 2
(PM2).
2. Do not set a pin to be used as a digital I/O pin with ADPC by using the analog input channel
specification register (ADS).
3. If data is written to ADPC, a wait cycle is generated. Do not write data to ADPC when the CPU
is operating on the subsystem clock and the peripheral hardware clock is stopped. For
details, see CHAPTER 31 CAUTIONS FOR WAIT.
CHAPTER 5 PORT FUNCTIONS
After reset: 00H R/W
6 5
0 0
ADPC2 ADPC1
ADPC0
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
Other than above
Preliminary User's Manual U17260EJ3V1UD
4 3 2
0 ADPC3 ADPC2
Digital I/O (D)/analog input (A) switching
P26/ P25/ P24/
P27/
ANI6 ANI5 ANI4
ANI7
0 A A A A
1 A A A A
A A A A
0
A A A
1 A
0 A A A A
A A A D
1
A D D
0 A
1 A D D D
D D D D
0
Setting prohibited
1 0
ADPC1 ADPC0
P23/ P22/ P21/ P20/
ANI3 ANI2 ANI1 ANI0
A A A A
A A A D
A A D D
A D D D
D D D D
D D D D
D D D D
D D D D
D D D D
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