Chapter 14 Serial Interface Uart0; Functions Of Serial Interface Uart0 - NEC 78K0 Series User Manual

14.1 Functions of Serial Interface UART0

Serial interface UART0 has the following two modes.
(1) Operation stop mode
This mode is used when serial communication is not executed and can enable a reduction in the power
consumption.
For details, see 14.4.1 Operation stop mode.
(2) Asynchronous serial interface (UART) mode
The functions of this mode are outlined below.
For details, see 14.4.2
generator.
• Maximum transfer rate: 312.5 kbps
• Two-pin configuration
• Length of communication data can be selected from 7 or 8 bits.
• Dedicated on-chip 5-bit baud rate generator allowing any baud rate to be set
• Transmission and reception can be performed independently (full-duplex operation).
• Fixed to LSB-first communication
Cautions 1. If clock supply to serial interface UART0 is not stopped (e.g., in the HALT mode), normal
operation continues. If clock supply to serial interface UART0 is stopped (e.g., in the STOP
mode), each register stops operating, and holds the value immediately before clock supply
was stopped. The T
stopped and outputs it. However, the operation is not guaranteed after clock supply is
resumed. Therefore, reset the circuit so that POWER0 = 0, RXE0 = 0, and TXE0 = 0.
2. Set POWER0 = 1 and then set TXE0 = 1 (transmission) or RXE0 = 1 (reception) to start
communication.
3. TXE0 and RXE0 are synchronized by the base clock (f
transmission or reception again, set TXE0 or RXE0 to 1 at least two clocks of base clock
after TXE0 or RXE0 has been cleared to 0. If TXE0 or RXE0 is set within two clocks of base
clock, the transmission circuit or reception circuit may not be initialized.
4. Set transmit data to TXS0 at least one base clock (f
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CHAPTER 14 SERIAL INTERFACE UART0

Asynchronous serial interface (UART) mode and 14.4.3
T D0: Transmit data output pin
X
R D0: Receive data input pin
X
D0 pin also holds the value immediately before clock supply was
X
Preliminary User's Manual U17260EJ3V1UD
Dedicated baud rate
) set by BRGC0. To enable
XCLK0
) after setting TXE0 = 1.
XCLK0