Dead Line Detection; Main Logic - ABB RET650 Technical Manual

Relion 650 series transformer protection
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Section 11
Secondary system supervision
11.1.7.3
11.1.7.4
250

Dead line detection

A simplified diagram for the functionality is found in figure 113. A dead phase
condition is indicated if both the voltage and the current in one phase is below their
respective setting values UDLD< and IDLD<. If at least one phase is considered to be
dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated. If all
three phases are considered to be dead the output DLD3PH is activated
Dead Line Detection
IL1
IL2
IL3
IDLD<
UL1
UL2
UL3
UDLD<
intBlock
IEC10000035 V2 EN
Figure 113:
Simplified logic diagram for Dead Line detection part

Main logic

A simplified diagram for the functionality is found in figure 114. The fuse failure
supervision function (SDDRFUF) can be switched on or off by the setting parameter
Operation to On or Off.
For increased flexibility and adaptation to system requirements an operation mode
selector, OpMode, has been introduced to make it possible to select different operating
modes for the negative and zero sequence based algorithms. The different operation
modes are:
Off. The negative and zero sequence function is switched off.
UNsINs. Negative sequence is selected.
UZsIZs. Zero sequence is selected.
a
a<b
b
AND
a
a<b
b
a
a<b
b
AND
a
a<b
b
AND
a
a<b
b
AND
a
a<b
b
1MRK 504 135-UEN A
AllCurrLow
DeadLineDet1Ph
DLD1PH
OR
AND
AND
DLD3PH
AND
IEC10000035-1-en.vsd
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