Logic Diagram - ABB RET650 Technical Manual

1MRK 504 135-UEN A
12.2.2.4
Technical manual

Logic diagram

QA1_OP
QA1_CL =1
QB1_OP
QB1_CL =1
QB2_OP
QB2_CL =1
QC3_OP
QC3_CL =1
QC4_OP
QC4_CL =1
S1QC1_OP
S1QC1_CL =1
S2QC2_OP
S2QC2_CL =1
VPQB1
QB1_OP
& >1
QA1O_EX1
1
VPQB2
QB2_OP
&
QA1O_EX2
VP_BBTR
BBTR_OP
&
EXDU_12
QA1O_EX3
VPQB1
VPQB2 &
1
VPQA1
VPQC3
>1
&
VPQC4
1
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
EXDU_ES
QB1_EX1
VPQC3
VPS1QC1
&
QC3_CL
S1QC1_CL
EXDU_ES
QB1_EX2
IEC04000542 V1 EN
A1A2_BS
VPQA1
VPQB1
VPQB2
VPQC3
VPQC4
VPS1QC1
VPS2QC2
QA1OPREL
QA1OPITL
QA1CLREL
QA1CLITL
QB1REL
QB1ITL
en04000542.vsd
Section 12
Control
277