Dead Line Detection; Main Logic - ABB Relion 670 Series Technical Reference Manual

1MRK 505 208-UEN B
10.1.2.3
10.1.2.4
Technical reference manual

Dead line detection

A simplified diagram for the functionality is found in figure 151. A dead phase
condition is indicated if both the voltage and the current in one phase is below their
respective setting values UDLD< and IDLD<. If at least one phase is considered to
be dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated.
If all three phases are considered to be dead the output DLD3PH is activated
Dead Line Detection
IL1
IL2
IL3
IDLD<
UL1
UL2
UL3
UDLD<
intBlock
IEC10000035 V1 EN
Figure 151: Simplified logic diagram for Dead Line detection part

Main logic

A simplified diagram for the functionality is found in figure 152. The fuse failure
supervision function (SDDRFUF) can be switched on or off by the setting
parameter Operation to On or Off.
For increased flexibility and adaptation to system requirements an operation mode
selector, OpMode, has been introduced to make it possible to select different
operating modes for the negative and zero sequence based algorithms. The
different operation modes are:
• Off; The negative and zero sequence function is switched off
• UNsINs; Negative sequence is selected
• UZsIZs; Zero sequence is selected
Secondary system supervision
a
a<b
b
AND
a
a<b
b
a
a<b
b
AND
a
a<b
b
AND
a
a<b
b
AND
a
a<b
b
Section 10
AllCurrLow
DeadLineDet1Ph
DLD1PH
OR
AND
AND
DLD3PH
AND
IEC10000035-1-en.vsd
301