Logic Diagram; Technical Data - ABB RET650 Technical Manual

Section 9
Voltage protection
9.4.7.6
9.4.8
230

Logic diagram

BLOCK
U3P
Calc ulation
Ei
of inte rnal
induced (Ei / f)
voltage Ei
(Ur / fr)
IEC09000161 V3 EN
Figure 101: A simplified logic diagram of the Overexcitation protection
OEXPVPH
Simplification of the diagram is in the way the IEEE delays are calculated. The
cooling process is not shown. It is not shown that voltage and frequency are separately
checked against their respective limit values.

Technical data

Table 153: OEXPVPH technical data
Function
Operate value, start
Operate value, alarm
Operate value, high level
Curve type
Minimum time delay for inverse
function
Alarm time delay
AlarmL evel
M>V/Hz>
V/Hz>
k
M=
M
M
kForIEEE
M>V/Hz>>
V/Hz>>
M = relative V/Hz as service value
Range or value
UBase /f
(100–180)% of (
(50–120)% of start level
UBase /f
(100–200)% of (
IEEE
×
(0.18 ) k
=
IEEE t :
-
2
( M 1)
EQUATION1319 V1 EN
where M = (E/f)/(Ur/fr)
(0.000–60.000) s
(0.00–9000.00)
1MRK 504 135-UEN A
ALARM
&
t>tAlarm
t
tAlarm
100 ms
t>tMin
&
t
tMin
1
1800 s
t
IEC09000161_3_en.vsd
Accuracy
) ± 0.5% of U
rated
± 0.5% of U
± 0.5% of U at U > U
) ± 0.5% of U
rated
± 5% + 40 ms
(Equation 85)
± 0.5% ± 25 ms
± 0.5% ± 25 ms
Technical manual
TRIP
at U ≤ U
r r
r