Disf (Separation Of Mantissa And Exponent Of Single-Precision Or Double-Precision Real Number Data) - Panasonic FP7 Series Command Reference Manual

Cpu unit
Hide thumbs Also See for FP7 Series:
Table of Contents

Advertisement

11.24 DISF (Separation of Mantissa and Exponent of Single-precision or
11.24 DISF (Separation of Mantissa and Exponent of Single-precision
or Double-precision Real Number Data)
Ladder diagram
Available operation units (●: Available)
Operatio
bit
n unit
i
List of operands
Operand
Description
Starting address of the device where the target data to be separated is stored or the constant
S
(data format: according to the operation unit)
Starting address of the device where mantissa is stored (data format: according to the operation
unit)
D1
Range (common to SF and DF): 0.5 or more, and less than 1.0 as absolute value)
D2
Starting address of the device where exponent is stored (data format: signed 32-bit integer)
Available devices (●: Available)
Operan
d
W
W
X
Y
S
D1
D2
(Note 1)
Only 16-bit devices, and 32-bit devices can be modified (real number constants cannot be specified).
(Note 2)
Index register (I0 to IE)
(Note 3)
Can be specified only when the operation unit is a single-precision floating point real number (SF).
(Note 4)
Can be specified only when the operation unit is a double-precision floating point real number (DF).
WUME-FP7CPUPGR-12
US
16-Bit device:
W
W
W
S
D
L
R
L
S
D
T
D
Double-precision Real Number Data)
SS
UL
32-Bit
device:
TS
TE
U
W
WI
C
C
M
O
S
E
SL
SF
Real
Integer
numbe
r
D
IX
SF
F
(N
(N
(N
K
H
ote
ote
ote
2)
3)
4)
DF
St
rin
g
Index
modifie
r
(Note 1)
" "
11-49

Advertisement

Table of Contents
loading

Table of Contents