Panasonic FP7 Series Command Reference Manual page 193

Cpu unit
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Operation Example
X101
Regarding operation of TM, CT, and SR instructions between LOOP and LBL
instructions
● If the LBL instruction is located at an address after the LOOP instruction, each instruction is
processed as follows when the LOOP instruction is executed.
X100
1) TM instruction: Clocking is not performed. If it is not executed once during a single scan,
the correct time cannot be guaranteed.
2) CT instruction: Even if count input is ON, counting is not performed. The elapsed value is
retained.
3) SR instruction: Even if shift input is ON, no shift is performed. The contents of the
specified register are retained.
● If the LBL instruction is located at an address before the LOOP instruction, each instruction
is processed as follows when the LOOP instruction is executed.
WUME-FP7CPUPGR-12
3.27 LOOP, LBL (LOOP, Label)
LBL 2
LOOP 2
DT 0
LOOP 1
DT 0
LBL 1
1 is subtracted from
the value stored in
DT0. If the result is not
0, the instruction jumps
to LBL2 and the code
between LBL2 and
LOOP2 is repeated.
Jumps repeatedly
when the execution
condition is on.
3-89

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