Zrst (Block Clear) - Panasonic FP7 Series Command Reference Manual

5.10 ZRST (Block Clear)

5.10 ZRST (Block Clear)

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Ladder diagram
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Available operation units (●: Available)
Operatio
bit
n unit
i ●
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List of operands
Operand Description
D1 Starting bit address of the reset data
D2 End bit address of the reset data
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Available devices (●: Available)
Operand
X Y
D1 ● ●
D2 ● ●
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Outline of operation
● This instruction clears to zero (resets) from the area (bit address) specified by [D1] through
the area (bit address) specified by [D2].
● This can also be used for a package clearance of processes that are starting up from
Process [D1] to Process [D2] in the step ladder.
5-24
US SS
Bit device
R L T C P
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● ●
UL
Specification of bit of
E SR IN OT DT.n
●
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SL SF
word device
Index modifier
LD.n
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WUME-FP7CPUPGR-12
DF
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